e61db425e8
Add support for a pattern matching instruction selector. This is still in
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the early implementation phases, so it is disabled by default
llvm-svn: 7719
2003-08-11 14:59:22 +00:00
1d6ba3e359
Factor shared code
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llvm-svn: 7600
2003-08-05 16:34:44 +00:00
a2e2f5cc45
Rename function to be more consistent with filename
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llvm-svn: 7352
2003-07-26 23:49:58 +00:00
a92dce471b
Printer.cpp: Ditch addRequired/getAnalysis, because they leave
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Printer::doFinalization() out in the cold. Now we pass in a TargetMachine
to Printer's constructor and get the TargetData from the TargetMachine.
Don't pass TargetMachine or MRegisterInfo objects around in the Printer.
Constify TargetData references.
X86.h: Update comment and prototype of createX86CodePrinterPass().
X86TargetMachine.cpp: Update callers of createX86CodePrinterPass().
llvm-svn: 7275
2003-07-23 20:25:08 +00:00
ac94bab876
lib/Target/X86/X86TargetMachine.{cpp,h}: Add initial version
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(non-working) of llc guts for X86, and add a prototype for it.
llvm-svn: 6779
2003-06-18 21:43:21 +00:00
4f6cdbdf81
Remove two fields from TargetData which are target specific.
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llvm-svn: 5963
2003-04-26 20:11:09 +00:00
afdf01ef62
Fix compatibility bug: X86 aligns doubles to 4 bytes, not 8!
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llvm-svn: 5935
2003-04-25 06:05:57 +00:00
524608ab79
Add support for the Switch instruction by running the lowerSwitch pass first
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llvm-svn: 5867
2003-04-23 16:24:55 +00:00
30f40d94cc
Rename -no-* to -disable-*
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llvm-svn: 5642
2003-02-26 20:00:41 +00:00
b2809dc6b5
Implement code to keep the stack pointer aligned to an 8 byte boundary.
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This improves the performance of the power benchmark by a few percent.
This will be neccesary for SSE code, which requires 16 byte alignment of
the stack.
llvm-svn: 5320
2003-01-16 02:20:12 +00:00
962d5befb3
* No longer need lowerallocation pass
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* Add X86 Stackifier pass
* Add peephole optimizer pass
llvm-svn: 5233
2003-01-13 00:51:23 +00:00
9a81e69439
* Initialize new FrameInfo member
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* most pass ctors no longer take TM arguments
* New prolog/epilog insertion pass
llvm-svn: 5188
2002-12-28 20:33:32 +00:00
55aaff5590
Free machine code
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llvm-svn: 5146
2002-12-25 05:06:21 +00:00
a32b4055be
Changes to allow for a configurable target machine that allows big endian and/or long pointer operation
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llvm-svn: 5131
2002-12-24 00:04:01 +00:00
d9c6f2a6d3
Local register allocator is now stable enough for use, it passes all tests
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llvm-svn: 5094
2002-12-17 02:51:15 +00:00
e0c25aaf99
Add mechanism to select register allocator to use
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llvm-svn: 5079
2002-12-16 16:15:51 +00:00
0b9f0b5faf
Rename createSimpleX86RegisterAllocator to createSimpleRegisterAllocator
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llvm-svn: 5071
2002-12-16 14:38:13 +00:00
ca8eb8af18
Make function code generation printing debug-only.
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llvm-svn: 5023
2002-12-13 13:16:14 +00:00
4e2c30d894
brg
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InstSelectSimple.cpp: Add stub implementation of visitFreeInst.
Add comments that mention how we are failing to implement malloc/free.
Add initial implementation of visitAllocaInst.
X86TargetMachine.cpp: Include llvm/Transforms/Scalar.h.
Add LowerAllocations pass before instruction selection.
jello/Makefile: Add scalaropts.a.
llvm-svn: 4994
2002-12-13 06:46:31 +00:00
55cf6bfae4
Enable the register allocator pass.
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llvm-svn: 4829
2002-11-22 22:45:07 +00:00
d7a855668d
Print machine code after instruction selection
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llvm-svn: 4434
2002-10-30 00:47:49 +00:00
02a3d837c2
Convert backend to use passes, implement X86TargetMachine
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llvm-svn: 4421
2002-10-29 22:37:54 +00:00
Chris Lattner