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15447 Commits

Author SHA1 Message Date
Dale Johannesen 786874de82 MMX parameters aren't handled here yet. 
llvm-svn: 114844
 2010-09-27 17:29:47 +00:00
Chris Lattner b6a7f97c88 yet more aliases. 
llvm-svn: 114822
 2010-09-27 07:24:57 +00:00
Chris Lattner 882626cd5b add a couple more aliases, rdar://8456378 
llvm-svn: 114821
 2010-09-27 07:21:41 +00:00
Chris Lattner 972c60d821 fix rdar://8470918 - llvm-mc can't assemble smovl 
llvm-svn: 114819
 2010-09-27 07:11:53 +00:00
Chris Lattner ff0062af62 Fix rdar://8468087 - llvm-mc commutes fmul (and friend) operands. 
My previous fix for rdar://8456371 should only apply to fmulp/faddp,
not to fmul/fadd.  Instruction set orthogonality is overrated or 
something.

llvm-svn: 114818
 2010-09-27 07:08:21 +00:00
Chris Lattner 9f06f911d1 the latest assembler that runs on powerpc 10.4 machines doesn't 
support aligned comm.  Detect when compiling for 10.4 and don't
emit an alignment for comm.  THis will hopefully fix PR8198.

llvm-svn: 114817
 2010-09-27 06:44:54 +00:00
Chris Lattner b5b71e07af improve indentation 
llvm-svn: 114815
 2010-09-27 06:34:01 +00:00
Eric Christopher 0720611e3a Insert missing coherency in comment. Add a quick check for hardware 
divide support also.

llvm-svn: 114813
 2010-09-27 06:08:12 +00:00
Eric Christopher 29ab6d1f82 Mass rename for Jim. 
llvm-svn: 114812
 2010-09-27 06:02:23 +00:00
Eric Christopher 422e463be7 This code should never fire on non-darwin subtargets. 
llvm-svn: 114811
 2010-09-27 06:01:51 +00:00
Chris Lattner 4f59cbfb66 implement support for 'clr' alias. This is part of rdar://8416805, 
but balrog was wanting it on irc.

llvm-svn: 114809
 2010-09-27 04:23:03 +00:00
Che-Liang Chiou 299479020a Add ret instruction to PTX backend 
llvm-svn: 114788
 2010-09-25 07:46:17 +00:00
Rafael Espindola 75d65b9a03 Move ELF to HasReliableSymbolDifference=true. Also take the opportunity to put 
symbols defined in merge sections in independent atoms.

llvm-svn: 114786
 2010-09-25 05:42:19 +00:00
Evan Cheng 48cc21620f Fix IIC_iEXTAr itinerary class of Cortex-A9. 
llvm-svn: 114784
 2010-09-25 01:09:28 +00:00
Evan Cheng 8f9a2244fc Remove a unused instruction itinerary class. 
llvm-svn: 114782
 2010-09-25 01:06:02 +00:00
Evan Cheng 62d626ce86 Fix zero and sign extension instructions scheduling itineraries. 
llvm-svn: 114780
 2010-09-25 00:49:35 +00:00
Evan Cheng e37da03e60 More pseudo instruction scheduling itinerary fixes. 
llvm-svn: 114768
 2010-09-24 22:41:41 +00:00
Evan Cheng 1d35ad62cc Fix scheduling itinerary for pseudo mov immediate instructions which expand into two real instructions. 
llvm-svn: 114766
 2010-09-24 22:03:46 +00:00
Jim Grosbach 4a6ab13fb9 Add ARM explicit MCInst lowering for the Thumb eh.sjlj.setjmp sequence. 
llvm-svn: 114758
 2010-09-24 20:47:58 +00:00
Evan Cheng dbcc4b4d4d Enable code placement optimization pass for ARM. 
llvm-svn: 114746
 2010-09-24 19:07:23 +00:00
Dale Johannesen 6a4cd59b08 We can't return SSE/MMX vectors if SSE is disabled. 
llvm-svn: 114745
 2010-09-24 19:05:48 +00:00
Evan Cheng 40a4222996 Fix a potential null dereference bug. 
llvm-svn: 114723
 2010-09-24 05:18:35 +00:00
Owen Anderson 2c5df619c4 Revert r114703 and r114702, removing the isConditionalMove flag from instructions. After further 
reflection, this isn't going to achieve the purpose I intended it for.  Back to the drawing board!

llvm-svn: 114710
 2010-09-23 23:45:25 +00:00
Bob Wilson 7fbbe9a43a Set alignment operand for NEON VST instructions. 
llvm-svn: 114709
 2010-09-23 23:42:37 +00:00
Jim Grosbach c0aed7179a ARM-mode eh.sjlj.setjmp pseudo MC-inst lowering expansion 
llvm-svn: 114707
 2010-09-23 23:33:56 +00:00
Jim Grosbach 2f3728f576 #+4 --> #4 for consistency with other asm output 
llvm-svn: 114706
 2010-09-23 23:32:38 +00:00
Jim Grosbach 07f07290d8 Fix formatting of output .s code 
llvm-svn: 114705
 2010-09-23 23:03:26 +00:00
Owen Anderson bd57e0ce3d Add isConditionalMove bits to X86 and ARM instructions. 
llvm-svn: 114703
 2010-09-23 22:57:01 +00:00
Bob Wilson 9eeb890172 Set alignment operand for NEON VLD instructions. 
llvm-svn: 114696
 2010-09-23 21:43:54 +00:00
Jim Grosbach 7d34837676 never mind. I can't read, apparently 
llvm-svn: 114689
 2010-09-23 19:42:17 +00:00
Evan Cheng 1596f7f6f3 Fix r114632. Return if the only terminator is an unconditional branch after the redundant ones are deleted. 
llvm-svn: 114688
 2010-09-23 19:42:03 +00:00
Jim Grosbach 836341a17a Fix opcode value for the 'trap' instruction, keeping the type suffix on the 
constant. Hopefully the non-Darwin bots will like it...

llvm-svn: 114687
 2010-09-23 19:32:40 +00:00
Jim Grosbach 3d50a3e237 explicit 'unsigned long' on constant value. Hopefully make bots happier. 
llvm-svn: 114686
 2010-09-23 19:08:04 +00:00
Benjamin Kramer e38495dbc0 Unbreak build. Jim, please review. 
llvm-svn: 114684
 2010-09-23 18:57:26 +00:00
Jim Grosbach 8503054410 Clean up the 'trap' instruction printing a bit. Non-Darwin assemblers don't 
(yet) recognize the 'trap' mnemonic, so we use .short/.long to emit the
opcode directly. On Darwin, however, we do want the mnemonic for more
readable assembly code and better disassembly.

Adjust the .td file to use the 'trap' mnemonic and handle using the binutils
workaround in the assembly printer. Also tweak the formatting of the opcode
values to make them consistent between the MC printer and the old printer.

llvm-svn: 114679
 2010-09-23 18:05:37 +00:00
Jim Grosbach ea20e257b2 nuke unused var 
llvm-svn: 114676
 2010-09-23 17:58:00 +00:00
Evan Cheng 66c8cd2b32 If there are multiple unconditional branches terminating a block, eliminate all 
but the first one. Those will never be executed. There was logic to do this
but it was faulty.

llvm-svn: 114632
 2010-09-23 06:54:40 +00:00
Jim Grosbach 85dcd3d0f4 Add support for ELF PLT references for ARM MC asm printing. Adding a 
new VariantKind to the MCSymbolExpr seems like overkill, but I'm not sure
there's a more straightforward way to get the printing difference captured.
(i.e., x86 uses @PLT, ARM uses (PLT)).

llvm-svn: 114613
 2010-09-22 23:27:36 +00:00
Jim Grosbach a9424d4f2f Enable a few additional asserts in MC instruction lowering. 
llvm-svn: 114601
 2010-09-22 23:01:28 +00:00
Cameron Esfahani bbb9287080 Fix PR8201: Update the code to call via X86::CALL64pcrel32 in the 64-bit case. 
llvm-svn: 114597
 2010-09-22 22:35:21 +00:00
Bob Wilson 463a05342a Change VDUPLANE DAG combiner to just return the result instead of calling 
CombineTo to avoid putting the result on the worklist.  I don't think it makes
much difference for now, but it might help someday as we add more DAG
combine optimizations.

llvm-svn: 114595
 2010-09-22 22:27:30 +00:00
Bob Wilson 2280674fa9 Combine both VMOVDRR(VMOVRRD) and VMOVRRD(VMOVDRR), instead of just doing one 
of those.  Refactor to share code for handling BUILD_VECTOR(VMOVRRD).
I don't have a testcase that exercises this, but it seems like an obvious
good thing to do.

llvm-svn: 114589
 2010-09-22 22:09:21 +00:00
Jim Grosbach 1f57cc4a59 add FIXME 
llvm-svn: 114578
 2010-09-22 20:55:15 +00:00
Eric Christopher c1b3e072f4 Temporarily work around new address lowering while I figure out what 
needs to happen for darwin.

llvm-svn: 114577
 2010-09-22 20:42:08 +00:00
Jim Grosbach 003fd5b65e Remove a few commented out bits 
llvm-svn: 114576
 2010-09-22 20:32:34 +00:00
Jim Grosbach e12c8ba05b Add PrintSpecial() handling for in ARM MC instruction printer. 
llvm-svn: 114563
 2010-09-22 18:37:14 +00:00
Jim Grosbach 284eebc1ae Add MC instruction printer support for ARM and Thumb1 jump tables. 
llvm-svn: 114555
 2010-09-22 17:39:48 +00:00
Bob Wilson e1223fb583 Attempt to fix llvm-gcc build. It was crashing when building gcov.o for an 
ARM cross-compiler on x86, because the MMO size did not match the type size.
This fixes the MMO size and also the size of the stack object to match the
type size.

llvm-svn: 114554
 2010-09-22 17:35:14 +00:00
Jim Grosbach 1573b29ea7 Add MC instruction printer support for TB[BH] style thumb2 jump tables. 
llvm-svn: 114553
 2010-09-22 17:15:35 +00:00
Jim Grosbach 754e1efffc Clean up comment. 
llvm-svn: 114550
 2010-09-22 16:45:13 +00:00