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Author SHA1 Message Date
Rafael Espindola 29dda21e96 Remove arm_apcscc from the test files. It is the default and doing this 
matches what llvm-gcc and clang now produce.

llvm-svn: 106221
 2010-06-17 15:18:27 +00:00
Bob Wilson 3152b0471b Handle ARM inline asm "w" constraints with 64-bit ("d") registers. 
The change in SelectionDAGBuilder is needed to allow using bitcasts to convert
between f64 (the default type for ARM "d" registers) and 64-bit Neon vector
types.  Radar 7457110.

llvm-svn: 91649
 2009-12-18 01:03:29 +00:00
Evan Cheng 0c2544fd6b - Support inline asm 'w' constraint for 128-bit vector types. 
- Also support the 'q' NEON registers asm code.

llvm-svn: 90894
 2009-12-08 23:06:22 +00:00