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66 Commits

Author SHA1 Message Date
Sirish Pande b486144c12 HexagonPacketizer patch. 
llvm-svn: 154616
 2012-04-12 21:06:38 +00:00
Evandro Menezes 5cee621c88 Hexagon: enable assembler output through the MC layer. 
llvm-svn: 154597
 2012-04-12 17:55:53 +00:00
Craig Topper b25fda95f6 Reorder includes in Target backends to following coding standards. Remove some superfluous forward declarations. 
llvm-svn: 152997
 2012-03-17 18:46:09 +00:00
Sirish Pande 2a783d5b94 Efficient pattern for store truncate. Patch by Evandro Menezes. 
llvm-svn: 151166
 2012-02-22 16:45:10 +00:00
Jia Liu b22310fda6 Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 
llvm-svn: 150878
 2012-02-18 12:03:15 +00:00
Sirish Pande 30804c24ca Optimize redundant sign extends and negation of predicates. 
llvm-svn: 150606
 2012-02-15 18:52:27 +00:00
Eric Christopher d9811eb7be Revert "Optimize redundant sign extends and negation of predicates" 
as it's breaking the build.

This reverts commit 11241abca5e2a313412fed594bb9d9fa2a2057fb.

llvm-svn: 150604
 2012-02-15 18:32:25 +00:00
Sirish Pande 4736aee81e Optimize redundant sign extends and negation of predicates 
llvm-svn: 150601
 2012-02-15 18:22:18 +00:00
Brendon Cahoon 6f35837048 Use TSFlag bit to describe instruction properties. 
Creating the isPredicated TSFlag enables the code
to use the property defined in the instruction format
instead of using a large switch statement.

llvm-svn: 150078
 2012-02-08 18:25:47 +00:00
Craig Topper e55c556a24 Convert assert(0) to llvm_unreachable 
llvm-svn: 149961
 2012-02-07 02:50:20 +00:00
Benjamin Kramer ae87d7b4b2 Hexagon: Remove forbidden iostream includes (it introduces static initializers) 
Reorder includes while at it.

llvm-svn: 149863
 2012-02-06 10:19:29 +00:00
Andrew Trick d06df96a7c VLIW specific scheduler framework that utilizes deterministic finite automaton (DFA). 
This new scheduler plugs into the existing selection DAG scheduling framework. It is a top-down critical path scheduler that tracks register pressure and uses a DFA for pipeline modeling.

Patch by Sergei Larin!

llvm-svn: 149547
 2012-02-01 22:13:57 +00:00
David Blaikie 46a9f016c5 More dead code removal (using -Wunreachable-code) 
llvm-svn: 148578
 2012-01-20 21:51:11 +00:00
Benjamin Kramer b668401b2e Clean up some Release build warnings. 
llvm-svn: 147289
 2011-12-27 11:41:05 +00:00
Tony Linthicum b3705e0b9e Add MCTargetDesc library to Hexagon target 
llvm-svn: 146692
 2011-12-15 22:29:08 +00:00
Tony Linthicum 1213a7a57f Hexagon backend support 
llvm-svn: 146412
 2011-12-12 21:14:40 +00:00