aa6f2af4e6
[RISCV] Fix inline-asm.ll test by adding nounwind attribute
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This test failed since CFI directive support was added in r361320.
llvm-svn: 363123
2019-06-12 05:32:30 +00:00
28a5cadb3a
[RISCV] Lower inline asm constraints I, J & K for RISC-V
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This validates and lowers arguments to inline asm nodes which have the
constraints I, J & K, with the following semantics (equivalent to GCC):
I: Any 12-bit signed immediate.
J: Immediate integer zero only.
K: Any 5-bit unsigned immediate.
Differential Revision: https://reviews.llvm.org/D54093
llvm-svn: 363054
2019-06-11 12:42:13 +00:00
5dabe03b41
[RISCV][NFC] Add nounwind attribute to functions missing it in test/CodeGen/RISCV
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r360897 was incomplete, must have applied an old/wip patch. This is in preparation for emitting CFI directives.
llvm-svn: 361493
2019-05-23 12:43:13 +00:00
4efa0b674d
[RISCV][NFC] Add RV64I CHECK lines to inline-asm.ll test
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llvm-svn: 354028
2019-02-14 13:09:54 +00:00
0171a9f4ec
[RISCV] Peephole optimisation for load/store of global values or constant addresses
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(load (add base, off), 0) -> (load base, off)
(store val, (add base, off)) -> (store val, base, off)
This is similar to an equivalent peephole optimisation in PPCISelDAGToDAG.
llvm-svn: 327831
2018-03-19 11:54:28 +00:00
7d6aa1f7ae
[RISCV] Implement frame pointer elimination
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llvm-svn: 322839
2018-01-18 11:34:02 +00:00
9330e64485
[RISCV] Add basic support for inline asm constraints
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llvm-svn: 322217
2018-01-10 20:05:09 +00:00
Alex Bradbury