f3e77fb7a7
Rename statistic and add another one.
...
llvm-svn: 11674
2004-02-20 20:43:08 +00:00
22de21ea80
Fix crash in debug output.
...
llvm-svn: 11659
2004-02-20 06:41:12 +00:00
bcc99a83ee
Fix instruction numbering in debug output.
...
llvm-svn: 11655
2004-02-20 06:29:51 +00:00
76eca062ea
Too many changes in one commit:
...
1. LiveIntervals now implement a 4 slot per instruction model. Load,
Use, Def and a Store slot. This is required in order to correctly
represent caller saved register clobbering on function calls,
register reuse in the same instruction (def resues last use) and
also spill code added later by the allocator. The previous
representation (2 slots per instruction) was insufficient and as a
result was causing subtle bugs.
2. Fixes in spill code generation. This was the major cause of
failures in the test suite.
3. Linear scan now has core support for folding memory operands. This
is untested and not enabled (the live interval update function does
not attempt to fold loads/stores in instructions).
4. Lots of improvements in the debugging output of both live intervals
and linear scan. Give it a try... it is beautiful :-)
In summary the above fixes all the issues with the recent reserved
register elimination changes and get the allocator very close to the
next big step: folding memory operands.
llvm-svn: 11654
2004-02-20 06:15:40 +00:00
3cf546037e
Fix RA::verifyAssignment()
...
llvm-svn: 11629
2004-02-19 19:24:17 +00:00
f5c5e1f458
Fix problem fusing spill code into instructions: we didn't update the live
...
variable information to take into account the change of instruction
address.
llvm-svn: 11628
2004-02-19 18:34:02 +00:00
4c988391e1
Fix an iterator invalidation problem. :(
...
llvm-svn: 11627
2004-02-19 18:32:29 +00:00
afa9d7eb85
Add method to update livevar when an instruction moves
...
llvm-svn: 11625
2004-02-19 18:28:02 +00:00
63f41abfe6
Fix a __LONG__ term annoyance of mine: symbolic registers weren't being printed
...
by operator<< on MachineInstr's, and looking up what register "24" is all of the
time was greatly annoying.
llvm-svn: 11623
2004-02-19 16:17:08 +00:00
d23a882f2f
Add a MachineBasicBlock::getParent() method
...
llvm-svn: 11622
2004-02-19 16:13:54 +00:00
d0a60b71fc
Rename reloads/spills to loads/stores.
...
llvm-svn: 11619
2004-02-19 06:19:09 +00:00
b490a12501
Implement assignment correctness verification.
...
llvm-svn: 11609
2004-02-18 23:15:23 +00:00
83398e5574
Eliminate operator[] is deprecated warnings
...
llvm-svn: 11578
2004-02-18 16:43:51 +00:00
e99a833c20
Fix deprecated operator[] warnings
...
llvm-svn: 11577
2004-02-18 16:38:18 +00:00
7bef0eafc0
Be more agressive when joining ranges.
...
llvm-svn: 11575
2004-02-18 04:38:37 +00:00
739e5e33d7
Fix overly conservative spill interval computation.
...
llvm-svn: 11574
2004-02-18 03:35:38 +00:00
26583db8b6
Beautify debug output.
...
llvm-svn: 11573
2004-02-18 00:35:06 +00:00
3d894dd3ab
Remove the -disable-kill option. The register allocator is buggy with it,
...
and it was only for debugging in the first place.
llvm-svn: 11557
2004-02-17 17:49:10 +00:00
4e21b2352c
Add support to the local allocator for fusing spill code into the instructions
...
that need them. This is very useful on CISCy targets like the X86 because it
reduces the total spill pressure, and makes better use of it's (large)
instruction set. Though the X86 backend doesn't know how to rewrite many
instructions yet, this already makes a substantial difference on 176.gcc for
example:
Before:
Time:
8.0099 ( 31.2%) 0.0100 ( 12.5%) 8.0199 ( 31.2%) 7.7186 ( 30.0%) Local Register Allocator
Code quality:
734559 asm-printer - Number of machine instrs printed
111395 ra-local - Number of registers reloaded
79902 ra-local - Number of registers spilled
231554 x86-peephole - Number of peephole optimization performed
After:
Time:
7.8700 ( 30.6%) 0.0099 ( 19.9%) 7.8800 ( 30.6%) 7.7892 ( 30.2%) Local Register Allocator
Code quality:
733083 asm-printer - Number of machine instrs printed
2379 ra-local - Number of reloads fused into instructions
109046 ra-local - Number of registers reloaded
79881 ra-local - Number of registers spilled
230658 x86-peephole - Number of peephole optimization performed
So by fusing 2300 instructions, we reduced the static number of instructions
by 1500, and reduces the number of peepholes (and thus the work) by about 900.
This also clearly reduces the number of reload/spill instructions that are
emitted.
llvm-svn: 11542
2004-02-17 08:09:40 +00:00
d1289d0fcd
Fix a bug in my previous refactoring change... arg!
...
llvm-svn: 11535
2004-02-17 07:02:17 +00:00
ba9e3e2fb1
Once we have a way to fold spill code reloads into instructions, we have a way to use it. :)
...
llvm-svn: 11517
2004-02-17 04:08:37 +00:00
4f7c2d9e5e
Fix spilled interval update. It was too conservative.
...
llvm-svn: 11516
2004-02-17 04:04:20 +00:00
ddedac59fe
Refactor code a bit. No functionality changes, though the comment hints at things to come.
...
llvm-svn: 11515
2004-02-17 03:57:19 +00:00
14f3fe81c6
Add LeakDetection to MachineInstr.
...
Move out of line member functions of MachineBasicBlock to
MachineBasicBlock.cpp.
llvm-svn: 11497
2004-02-16 07:17:43 +00:00
e27f33f00e
This pass should not require phi elimination or live variable
...
analysis. It should only preserve them and update LiveVariables if it
already ran.
llvm-svn: 11479
2004-02-15 21:50:32 +00:00
a8d97e4e74
Finegrainify namespacification
...
Remove one of the operands of a two operand instruction
llvm-svn: 11478
2004-02-15 21:38:28 +00:00
bbf53937a4
Make dense maps keyed on physical registers smallerusing
...
MRegisterInfo::getNumRegs() instead of
MRegisterInfo::FirstVirtualRegister.
Also use MRegisterInfo::is{Physical,Virtual}Register where
appropriate.
llvm-svn: 11477
2004-02-15 21:37:17 +00:00
2c5ddd20ba
Eliminate the use of spill (reserved) registers.
...
llvm-svn: 11476
2004-02-15 10:24:21 +00:00
1dfa97034d
Allow for fixed objects to reside in the local area, and if they don't to not
...
clobber them by allocating other objects in the same space!
llvm-svn: 11454
2004-02-15 00:14:20 +00:00
6a35516dcc
Add back machine code deleter pass until we get a MachineCode pass
...
that will be responsible for the creation of MachineFunctions and will
be required by all MachineFunctionPass passes.
llvm-svn: 11453
2004-02-15 00:03:15 +00:00
612ce0c47c
There is no reason to align the stack pointer if there are no callees of this function!
...
llvm-svn: 11449
2004-02-14 20:10:59 +00:00
5a92240270
Use newly added next() and prior() utility functions.
...
llvm-svn: 11430
2004-02-14 01:18:34 +00:00
ddcb4ad53e
Use std::numeric_limits<float>::infinity() instead of
...
std::numeric_limits<float>::max() for weighting preallocated
intervals.
llvm-svn: 11427
2004-02-14 00:44:07 +00:00
8cdd0215bf
Remove getAllocatedRegNum(). Use getReg() instead.
...
llvm-svn: 11393
2004-02-13 21:01:20 +00:00
de6a381691
Use getNumVirtualRegs().
...
Whitespace cleanups.
llvm-svn: 11389
2004-02-13 18:20:47 +00:00
52440fd481
Refactor MachineFunction::print() into MachineBasicBlock::print().
...
Add MachineBasicBlock::dump().
llvm-svn: 11364
2004-02-13 04:39:55 +00:00
e8f7c2f863
Add head-of-file comments and Doxygen comments. Tighten up a lot of whitespace.
...
Rename SetMachineOperandConst's formal parameters to match other methods here.
Mark some methods as being used only by the SPARC back-end.
Fix a missing-paren bug in OutputValue().
llvm-svn: 11363
2004-02-13 04:39:32 +00:00
de8ac749fe
Add parent pointer to MachineInstr that points to owning
...
MachineBasicBlock. Also change opcode to a short and numImplicitRefs
to an unsigned char so that overall MachineInstr's size stays the
same.
llvm-svn: 11357
2004-02-12 18:49:07 +00:00
6a597d6057
Rename the opCode instance variable to Opcode
...
llvm-svn: 11348
2004-02-12 16:09:53 +00:00
6108d9d5ee
This field is never read
...
llvm-svn: 11346
2004-02-12 16:04:49 +00:00
80da865f77
Change MachineBasicBlock's vector of MachineInstr pointers into an
...
ilist of MachineInstr objects. This allows constant time removal and
insertion of MachineInstr instances from anywhere in each
MachineBasicBlock. It also allows for constant time splicing of
MachineInstrs into or out of MachineBasicBlocks.
llvm-svn: 11340
2004-02-12 02:27:10 +00:00
0c3de446f6
getOpCode() --> getOpcode().
...
llvm-svn: 11339
2004-02-12 01:34:05 +00:00
b21ec54e61
Add #include
...
llvm-svn: 11285
2004-02-10 21:18:55 +00:00
5dd5be3ec3
Do not use MachineOperand::isVirtualRegister either!
...
llvm-svn: 11283
2004-02-10 21:12:22 +00:00
373fba5c1d
Eliminate users of MachineOperand::isPhysicalRegister
...
llvm-svn: 11278
2004-02-10 20:41:10 +00:00
2e1cbb735d
Move InstrSchedule's iterator begin/end methods inline.
...
llvm-svn: 11239
2004-02-09 18:42:46 +00:00
312e3a28d2
Make SchedGraph::dump() use SchedGraphNodeCommon's const_iterator
...
instead of randomly groping about inside its outEdges array.
Make SchedGraph::addDummyEdges() use getNumOutEdges() instead of
outEdges.size().
Get rid of ifdefed-out code in SchedGraph::buildGraph().
llvm-svn: 11238
2004-02-09 18:42:05 +00:00
80cbed4f61
Another nice speedup for the register allocator. This time, we replace
...
the Virt2PhysRegMap std::map with an std::vector. This speeds up the
register allocator another (almost) 40%, from .72->.45s in a release build
of LLC on 253.perlbmk.
llvm-svn: 11219
2004-02-09 02:12:04 +00:00
bbd9a43d20
Ugh, perform an optimization that GCC should be able to do itself. This
...
speeds up livevar from .48/.32s -> .45/.31s in LLC on perlbmk
llvm-svn: 11217
2004-02-09 01:43:23 +00:00
26407384ec
Only do stuff for the REAL number of physical registers we have, not 1024.
...
This speeds up live variables a lot, from .60/.39s -> .47/.26s in LLC, for
the first/second pass respectively.
llvm-svn: 11216
2004-02-09 01:35:21 +00:00
490627a404
Change the PhysRegsUsed map into a dense array. Seeing that this is a mapping
...
from physical registers, and they are always dense, it makes sense to not have
a ton of RBtree overhead. This change speeds up regalloclocal about ~30% on
253.perlbmk, from .35s -> .27s in the JIT (in LLC, it goes from .74 -> .55).
Now live variable analysis is the slowest codegen pass. Of course it doesn't
help that we have to run it twice, because regalloclocal doesn't update it,
but even if it did it would be the slowest pass (now it's just the 2x slowest
pass :(
llvm-svn: 11215
2004-02-09 01:26:13 +00:00
e82a70766e
Increase code clarity.
...
llvm-svn: 11151
2004-02-06 18:08:18 +00:00
cd2e7ffcc6
Eliminate uneeded lookups by passing a Virt2PhysMap::iterator instead
...
of the virtual register to certain functions.
llvm-svn: 11143
2004-02-06 03:15:40 +00:00
a97abeb342
Change live interval representation. Machine instructions now have two
...
slots each. As a concequence they get numbered as 0, 2, 4 and so
on. The first slot is used for operand uses and the second for
defs. Here's an example:
0: A = ...
2: B = ...
4: C = A + B ;; last use of A
The live intervals should look like:
A = [1, 5)
B = [3, x)
C = [5, y)
llvm-svn: 11141
2004-02-05 22:55:25 +00:00
1165c1081e
We don't need to scan the blocks that we are live-in on every
...
access. Rather we only have to do it on the creation of the interval.
llvm-svn: 11135
2004-02-05 20:45:40 +00:00
dd0c255d14
Added missing include.
...
llvm-svn: 11129
2004-02-05 05:04:39 +00:00
327426411e
Modify the two address instruction pass to remove the duplicate
...
operand of the instruction and thus simplify the register allocation.
llvm-svn: 11124
2004-02-04 22:17:40 +00:00
3d100ef0ca
When an instruction like: A += B had both A and B virtual registers
...
spilled, A was loaded from its stack location twice. This fixes the bug.
llvm-svn: 11093
2004-02-03 01:13:07 +00:00
74b26f77a3
Revert changes. Will implement this using a different set of primitives
...
llvm-svn: 11091
2004-02-02 23:08:58 +00:00
6e34205653
Fix debugging output.
...
llvm-svn: 11088
2004-02-02 22:00:32 +00:00
6471e66fbb
Correctly update def/use information for modified machine operands.
...
llvm-svn: 11087
2004-02-02 21:56:40 +00:00
86ff30deab
Should be more careful. The previously applied change made all counts
...
outside of loops = 0.
llvm-svn: 11085
2004-02-02 20:29:57 +00:00
2cecace9b2
Create an object for tracking physical register usage. This will look
...
much better when I get rid of the reserved registers.
llvm-svn: 11066
2004-02-02 07:30:36 +00:00
9b9c0485fd
Change weight array into a vector and make it as big as the number of
...
registers (not as the max number of registers).
Change toSpill from a std::set into a std::vector<bool>.
Use the reverse iterator adapter to do a reverse scan of allocatable
registers.
llvm-svn: 11061
2004-02-01 20:13:26 +00:00
5e05a59bf8
Use std::map::count() instead of std::map::find() != std::map::end()
...
where appropriate.
llvm-svn: 11060
2004-02-01 18:39:53 +00:00
a3a56fa041
Change string for joined intervals.
...
llvm-svn: 11057
2004-02-01 16:13:05 +00:00
84a84c38b7
Change xor to ^.
...
llvm-svn: 11054
2004-02-01 08:19:25 +00:00
cae054f59f
Fix a bug in a recent checkin
...
llvm-svn: 11050
2004-02-01 05:25:07 +00:00
8d4f06ed84
Missed one silly assert :-)
...
llvm-svn: 11048
2004-02-01 02:21:31 +00:00
69deb4d236
Simplify joinIntervals() code.
...
llvm-svn: 11047
2004-02-01 02:18:31 +00:00
91dcc03c39
Use MRegisterInfo::isPhysicalRegister and
...
MRegisterInfo::isVirtualRegister.
llvm-svn: 11045
2004-02-01 01:27:01 +00:00
662bb3f495
Apply final part of Chris' patch.
...
llvm-svn: 11040
2004-01-31 23:48:47 +00:00
459a67c309
Be a little smarter on the way we handle physical register defs.
...
llvm-svn: 11038
2004-01-31 23:13:30 +00:00
c330b98c1c
Finegrainify namespacification, use new MRegisterInfo::isVirtualRegister
...
method
llvm-svn: 11037
2004-01-31 21:27:19 +00:00
a2ef296994
Fix, correctly this time, the computation of the return value
...
Fix a spello
Tighten up the assertion checking
No functionality changes.
llvm-svn: 11036
2004-01-31 21:21:43 +00:00
626f431165
* Fix incorrect computation of the runOnMachineFunction return value
...
* Turn a bunch of instance variables into automatic variables
llvm-svn: 11035
2004-01-31 21:14:04 +00:00
d835aa6711
Remove unneeded #includes
...
Move Passes.h (which defines the interface to this file) to the top.
Move statistics to the top of the file.
Add a comment
llvm-svn: 11034
2004-01-31 21:07:15 +00:00
50d97e33b7
Merge safe parts from last night's buggy commit. These do not break
...
any test cases :-)
llvm-svn: 11032
2004-01-31 19:59:32 +00:00
cdf48ab294
Optimize liveAt() and overlaps(). We now use a binary search instead
...
of a linear search to find the first range for comparisons. This cuts
down the linear scan register allocator running time by a factor of 3
in 254.perlbmk and by a factor of 2.2 in 176.gcc.
llvm-svn: 11030
2004-01-31 16:54:54 +00:00
26665e2636
Revert last night's changes as they broke some tests. Will remerge parts of the patch.
...
llvm-svn: 11029
2004-01-31 14:37:41 +00:00
f2fb0fb486
Several performance enhancements and cleanups from Chris.
...
Simplification of LiveIntervals::Interval::overlaps() and addition of
examples to overlaps() and liveAt() to make them clearer.
llvm-svn: 11028
2004-01-31 04:56:07 +00:00
0770862334
Finegrainify namespacification
...
Implement LiveVariables::getIndexMachineBasicBlock
llvm-svn: 11018
2004-01-30 22:08:53 +00:00
845c0dd196
Give clients of MachineFunctionPrinter the ability to specify a banner and
...
choose an ostream.
llvm-svn: 11016
2004-01-30 21:53:46 +00:00
59e3325c26
Fix failing test cases with joined live intervals. It turns out that
...
when joining we need to check if we overlap with the second interval
or any of its aliases.
Also make joining intervals the default.
llvm-svn: 10973
2004-01-23 13:37:51 +00:00
73df113676
Add option to join live intervals. Two intervals are joined if there
...
is a move between two registers, at least one of the registers is
virtual and the two live intervals do not overlap.
This results in about 40% reduction in intervals, 30% decrease in the
register allocators running time and a 20% increase in peephole
optimizations (mainly move eliminations).
The option can be enabled by passing -join-liveintervals where
appropriate.
llvm-svn: 10965
2004-01-22 23:08:45 +00:00
e1c24c06f9
Remove unneeded check. An interval in active, by definition overlaps
...
with the current one.
llvm-svn: 10959
2004-01-22 20:07:18 +00:00
4716d76d22
Improve debugging output. Remove unneeded virtReg->0 mapping when
...
virtReg lives on the stack. Now a virtual register has an entry in the
virtual->physical map or the virtual->stack slot map but never in
both.
llvm-svn: 10958
2004-01-22 19:24:43 +00:00
19638ab2bd
Revert previous change. The code was correct...
...
llvm-svn: 10957
2004-01-22 19:17:52 +00:00
0aa9d0278d
Fix incorrect negatives in LiveIntervals::Interval::liveAt().
...
llvm-svn: 10956
2004-01-22 18:33:50 +00:00
7117b9751d
Moved iterators around.
...
llvm-svn: 10926
2004-01-20 17:51:13 +00:00
72494e04be
Moved iterators to common file.
...
llvm-svn: 10925
2004-01-20 17:49:42 +00:00
d844972574
Handle printing of intervals that are not assign to any physical
...
register yet (2nd try).
llvm-svn: 10896
2004-01-16 20:33:13 +00:00
8672af1cc8
Handle printing of intervals that are not assign to any physical
...
register yet.
llvm-svn: 10895
2004-01-16 20:29:42 +00:00
d86933d21d
Fold open interval ends handling into
...
LiveIntervals::Interval::expiredAt() and simplify regalloc code.
llvm-svn: 10894
2004-01-16 20:17:05 +00:00
e9c6ba891e
Add asserts to previous change.
...
llvm-svn: 10893
2004-01-16 16:23:23 +00:00
3010b3e38e
Use a list instead of a vector to store intervals. This will be needed
...
when we join intervals and one of the two will need to be removed.
llvm-svn: 10892
2004-01-16 16:06:59 +00:00
0680572553
Properly update #intervals statistic.
...
llvm-svn: 10847
2004-01-14 10:44:29 +00:00
2615c98042
Fix bug in LiveIntervals::Interval::overlaps and
...
LiveIntervals::Interval::liveAt. Both were considering the live ranges
closed in the end, when they are actually open.
llvm-svn: 10835
2004-01-14 00:20:09 +00:00
a0865cec3f
Improve debugging output.
...
llvm-svn: 10834
2004-01-14 00:09:36 +00:00
0431621429
Fix miscomputation of live intervals. The catch is that registers can
...
be dead at the defining instruction but can only be killed in
subsequent ones.
llvm-svn: 10833
2004-01-13 22:26:14 +00:00
1a01c80f1b
Remove allocatable registers vector. It is already provided by
...
LiveVariables.
llvm-svn: 10830
2004-01-13 22:10:43 +00:00
13e8623a3f
Cleanup debugging output.
...
llvm-svn: 10824
2004-01-13 21:53:20 +00:00
33f9cb1da7
Fix output of live intervals to show correctly its closed, open
...
ranges, i.e. [a,b)
llvm-svn: 10822
2004-01-13 21:17:47 +00:00
9d0c3d21c8
Remove unneeded check (with the recent change in live variables a use
...
of a physical register is always dominated by a def).
llvm-svn: 10821
2004-01-13 21:16:25 +00:00
65bc990bda
Indentation and whitespace cleanups.
...
llvm-svn: 10820
2004-01-13 20:42:08 +00:00
6b1ec75da9
Fix bug introduced by previous commit: check if fixed intervals
...
overlap before adding their spill weight.
llvm-svn: 10819
2004-01-13 20:37:01 +00:00
ebbd66c042
Correctly compute live variable information for physical registers
...
when an implicitely defined register is later used by an alias. For example:
call foo
%reg1024 = mov %AL
The call implicitely defines EAX but only AL is used. Before this fix
no information was available on AL. Now EAX and all its aliases except
AL get defined and die at the call instruction whereas AL lives to be
killed by the assignment.
llvm-svn: 10813
2004-01-13 06:24:30 +00:00
52a714b45b
Make LiveVariables::HandlePhysRegUse and
...
LiveVariables::HandlePhysRegDef private they use information that is
not in memory when LiveVariables finishes the analysis.
Also update the TwoAddressInstructionPass to not use this interface.
llvm-svn: 10755
2004-01-11 09:18:45 +00:00
8043f8c294
Remove use of llvm/CodeGen/InstrSelection.h
...
llvm-svn: 10749
2004-01-10 19:16:26 +00:00
a4ee66f3ea
Finegrainify namespacification.
...
This should get hunked over to the Sparc backend, along with
MachineCodeForInstruction and a bunch of files in include/llvm/Codegen,
but those battles will have to wait for a later time.
llvm-svn: 10731
2004-01-09 06:30:18 +00:00
83e84166a3
Move InstrSelection into lib/Target/Sparc, as it's sparc specific
...
llvm-svn: 10730
2004-01-09 06:24:06 +00:00
b9c7999881
Move lib/Codegen/RegAlloc into lib/Target/Sparc, as it is sparc specific
...
llvm-svn: 10728
2004-01-09 06:17:12 +00:00
ae5b3d4f74
Add a separate list of fixed intervals. This improves the running time
...
of the register allocator as follows:
before after
mesa 2.3790 1.5994
vpr 2.6008 1.2078
gcc 1.9840 0.5273
mcf 0.2569 0.0470
eon 1.8468 1.4359
twolf 0.9475 0.2004
burg 1.6807 1.3300
lambda 1.2191 0.3764
Speedups range anyware from 30% to over 400% :-)
llvm-svn: 10712
2004-01-07 09:20:58 +00:00
a64d71203e
Minor cleanups.
...
llvm-svn: 10711
2004-01-07 05:31:12 +00:00
9f62b96206
Remove declared but undefined method.
...
llvm-svn: 10710
2004-01-07 02:29:33 +00:00
1e01557c4e
Change implementation of LiveIntervals::overlap(). This results in a
...
30-50% decrease in running time of the linear scan register allocator.
llvm-svn: 10707
2004-01-07 01:45:58 +00:00
2fa1aef707
Remove simple coalescing.
...
llvm-svn: 10695
2004-01-05 08:24:57 +00:00
fc3d0598df
fix warning
...
llvm-svn: 10692
2004-01-05 05:42:17 +00:00
08c5311729
Currently we cannot handle two-address instructions of the form:
...
A = B op C where A == C, but this cannot really occur in practice
because of SSA form. Add an assert to check that just to be safe.
llvm-svn: 10682
2004-01-05 02:25:45 +00:00
5e0e67173d
Update description.
...
llvm-svn: 10681
2004-01-04 23:09:24 +00:00
5d236005b0
Clean up a lot of the code I added yesterday by exposing the IntrinsicLowering
...
implementation from the TargetMachine directly.
llvm-svn: 10636
2003-12-28 21:23:38 +00:00
a158dc8104
Reserve ECX and EDI instead of EBX and EDI. Since EBX is a callee
...
saved register it has a longer free range than ECX (which is defined
every time there is a fnuction call) which makes ECX a better register
to reserve.
llvm-svn: 10635
2003-12-28 18:03:52 +00:00
43b587d94d
Add coalescing to register allocator. A hint is added to each interval
...
which denotes the register we would like to be assigned to (virtual or
physical). In register allocation, if this hint exists and we can map
it to a physical register (it is either a physical register or it is a
virtual register that already got assigned to a physical one) we use
that register if it is available instead of a random one in the free
pool.
llvm-svn: 10634
2003-12-28 17:58:18 +00:00
10cac58d23
Whoops, don't try to lower non intrinsic calls
...
llvm-svn: 10632
2003-12-28 09:53:23 +00:00
4b75e04a60
Use the intrinsic lowering functionality
...
llvm-svn: 10626
2003-12-28 09:43:35 +00:00
24650d2b5e
Move into the VMCore library
...
llvm-svn: 10623
2003-12-28 08:30:20 +00:00
08c196dd4b
Implement the default implementation of the intrinsic lowering class
...
llvm-svn: 10621
2003-12-28 08:19:41 +00:00
27dd64242b
finegrainify namespacification
...
minor cleanups
llvm-svn: 10619
2003-12-28 07:59:53 +00:00
2e8c984c58
Improve debugging output when choosing a register to spill.
...
llvm-svn: 10604
2003-12-24 18:53:31 +00:00
eeea81483f
Do a separate pass to compute spill weights because doing it inline
...
with live intervals was missing registers that were used before they
were defined (in the arbitrary order live intervals numbers
instructions).
llvm-svn: 10603
2003-12-24 15:44:53 +00:00
7d7d7e89d4
Change the way free regusters are computed and perform better
...
allocation in the presence of preallocated intervals.
llvm-svn: 10595
2003-12-23 18:00:33 +00:00
3ec903474f
Fix crash when compiling twolf.
...
llvm-svn: 10584
2003-12-22 13:54:29 +00:00
690e1b8de2
Remove verifyIntervals() since it doesn't actually work right now.
...
llvm-svn: 10570
2003-12-21 20:41:26 +00:00
2665d9c6f9
Change weight into a float so that we can take into account the
...
nesting level when computing it. Right now the allocator uses:
w = sum_over_defs_uses( 10 ^ nesting level );
llvm-svn: 10569
2003-12-21 20:19:10 +00:00
c09b77ea35
Add support for inactive intervals. This effectively reuses registers
...
for live ranges that fall into assigned registers' holes.
llvm-svn: 10566
2003-12-21 05:43:40 +00:00
4cbb97bfdd
Add a new target-independent machine code freeing pass
...
llvm-svn: 10560
2003-12-20 10:20:58 +00:00
9a3478e022
* Finegrainify namespacification
...
* Move sparc specific code out of generic code
* Eliminate the getOffset() method which made INVALID_FRAME_OFFSET
necessary, which made pulling in MAX_INT as a sentinal necessary.
llvm-svn: 10553
2003-12-20 09:17:07 +00:00
7139090fd2
Remove TwoAddressInstruction from the public headers and add an ID
...
instead, since this pass doesn't expose any state to its users.
llvm-svn: 10520
2003-12-18 22:40:24 +00:00
8f88cdfa22
Prune some #includes
...
Add a statistic for # reloads
llvm-svn: 10518
2003-12-18 20:25:31 +00:00
e5e2bd6777
Modify linear scan register allocator to use the two-address
...
instruction pass. This also fixes all remaining bugs for this new
allocator to pass all tests under test/Programs.
llvm-svn: 10515
2003-12-18 13:15:02 +00:00
3bd69eaac5
Fix bug in reserved registers. DH actually aliases DX and EDX which
...
are not reserved registers.
llvm-svn: 10514
2003-12-18 13:12:18 +00:00
c17d57bd82
Modify local register allocator to use the two-address instruction pass.
...
llvm-svn: 10513
2003-12-18 13:08:52 +00:00
725021cb6c
Add TwoAddressInstructionPass to handle instructions that have two or
...
more operands and the two first operands are constrained to be the
same. The pass takes an instruction of the form:
a = b op c
and transforms it into:
a = b
a = a op c
and also preserves live variables.
llvm-svn: 10512
2003-12-18 13:06:04 +00:00
4d87219486
Rename LiveIntervals::expired() to LiveIntervals::expiredAt().
...
llvm-svn: 10511
2003-12-18 08:56:11 +00:00
15b8036b29
When a variable is killed and redifined in a basic block only one
...
killing instruction is tracked. This causes the LiveIntervals to
create bogus intervals. The workaound is to add a range to the
interval from the redefinition to the end of the basic block.
llvm-svn: 10510
2003-12-18 08:53:43 +00:00
40874c708f
Handle multiple virtual register definitions gracefully.
...
Move some of the longer LiveIntervals::Interval method out of the
header and add debug information to them. Fix bug and simplify range
merging code.
llvm-svn: 10509
2003-12-18 08:48:48 +00:00
8870674da7
Change preserve all claim to just preserve live variables and phielimination.
...
llvm-svn: 10469
2003-12-15 04:55:38 +00:00
aaba4639f8
Change interface of MachineOperand as follows:
...
a) remove opIsUse(), opIsDefOnly(), opIsDefAndUse()
b) add isUse(), isDef()
c) rename opHiBits32() to isHiBits32(),
opLoBits32() to isLoBits32(),
opHiBits64() to isHiBits64(),
opLoBits64() to isLoBits64().
This results to much more readable code, for example compare
"op.opIsDef() || op.opIsDefAndUse()" to "op.isDef()" a pattern used
very often in the code.
llvm-svn: 10461
2003-12-14 13:24:17 +00:00
4f7f017ab5
When reserving a preallocated register spill the aliases of this
...
register too.
llvm-svn: 10450
2003-12-13 11:58:10 +00:00
7dbdf3839c
Ignore non-allocatable physical registers in live interval analysis.
...
llvm-svn: 10449
2003-12-13 11:11:02 +00:00
ed53b35076
Expire any active intervals left when register allocation is done.
...
llvm-svn: 10448
2003-12-13 05:50:19 +00:00
e6dc614c3c
Add instruction numbers to debugging output.
...
llvm-svn: 10447
2003-12-13 05:48:57 +00:00
06f379a278
Handle explicit physical register defs.
...
llvm-svn: 10445
2003-12-13 05:26:39 +00:00
9bced9455a
Remove unecessary if statements when looping on ImplicitDefs.
...
llvm-svn: 10444
2003-12-13 01:20:58 +00:00
fb55ac24ec
This appears to fix Bug 172 and does not break any other feature tests or
...
regression tests.
llvm-svn: 10388
2003-12-10 22:51:41 +00:00
e59ad4b441
Make assertion stricter. Since the source operands are allocated at
...
this point, the second operand must be a physical register (it cannot
be a virtual one).
llvm-svn: 10292
2003-12-05 11:31:39 +00:00
f8fe176204
Fix bug in register spilling when a preallocated live range overlaps a
...
potential register assignment.
llvm-svn: 10291
2003-12-05 11:17:55 +00:00
2de099e54f
Move operator<<(std::ostream&, const LiveInterval&) out of the header file.
...
llvm-svn: 10290
2003-12-05 10:38:28 +00:00
ed28ca93ef
Sort live intervals by increasing start point.
...
llvm-svn: 10289
2003-12-05 10:32:01 +00:00
5fe0031c68
Improve debugging output and clean up some code.
...
llvm-svn: 10288
2003-12-04 03:57:28 +00:00
26f17e73eb
Print instructions before register allocation is performed. Also fix
...
bug where spill instructions were added to the next basic block
instead of the end of the current one if the instruction that required
the spill was the last in the block.
llvm-svn: 10272
2003-11-30 23:40:39 +00:00
0aa40f8db0
Remove "numReloaded" statistic.
...
llvm-svn: 10268
2003-11-30 05:15:36 +00:00
0e9ded74c0
Merging the linear scan register allocator in trunk. It currently passes most tests under test/Programs/SingleSource/Benchmarks/Shootout so development will continue on trunk. The allocator is not enabled by default. You will need to pass -regallo=linearscan to lli or llc to use it.
...
llvm-svn: 10103
2003-11-20 03:32:25 +00:00
960707c335
Put all LLVM code into the llvm namespace, as per bug 109.
...
llvm-svn: 9903
2003-11-11 22:41:34 +00:00
8f53a89edf
Fix problems linking against the reoptimizer; _llvm_regAllocState must have
...
externally-visible linkage, and SaveStateToModule must default to true for llc.
I don't remember why I made it const; perhaps it should be deconstified.
llvm-svn: 9858
2003-11-10 07:12:01 +00:00
c0c23c29aa
Operand numbers are now ints. Save the register allocation of the value
...
each instruction produces as "operand" -1, and the other operands as 0
.. n, as before. PhyRegAlloc::saveState() is refactored into
PhyRegAlloc::saveStateForValue().
llvm-svn: 9842
2003-11-10 00:05:26 +00:00
2b8724acc6
Let's not forget about our friends -- Constant Pool indices.
...
llvm-svn: 9750
2003-11-06 00:04:11 +00:00
a9e7fe9ea2
Do not use a class before it is defined.
...
Be gcc 3.4 clean
llvm-svn: 9727
2003-11-05 06:25:06 +00:00
69c2841b2a
Update verifySavedState()'s comment, so that it reflects its current
...
status. In doFinalization(), skip over external functions, just like
Anand's mapping info does.
llvm-svn: 9703
2003-11-04 22:42:41 +00:00
2a262ef095
Add comments.
...
llvm-svn: 9697
2003-11-04 18:25:56 +00:00
8541bd9db9
Include llvm/CodeGen/MachineCodeForInstruction.h. Use it to start
...
implementing verifySavedState().
In saveState(), use the new AllocInfo::AllocStateTy enum, and increment
Insn each time through the loop.
llvm-svn: 9617
2003-10-30 21:21:33 +00:00
727ec9bec5
Make AllocState an enum.
...
Move the stringifying method for that enum into class AllocInfo.
llvm-svn: 9616
2003-10-30 21:21:22 +00:00
eca381c7e8
Publicize the type of FnAllocState.
...
Prototype option to save state in a global instead of as a Constant in
the Module. (Turned off, for now, with the on/off switch welded in the off
position. You get the idea.)
llvm-svn: 9500
2003-10-24 21:21:58 +00:00
9ab7fbef60
standardize command line option names
...
llvm-svn: 9496
2003-10-24 20:05:58 +00:00
24fb8f07f3
Move the implementations of ==, != on AllocInfos here, from UnpackTraceFunction.
...
llvm-svn: 9452
2003-10-23 20:39:18 +00:00
390d31cde4
Move AllocInfo structure to a private AllocInfo.h header file.
...
Make FnAllocState contain vectors of AllocInfo, instead of LLVM Constants.
Give doFinalization a method comment, and let it do the work of converting
AllocInfos to LLVM Constants.
llvm-svn: 9451
2003-10-23 20:32:55 +00:00
a6bfe8eb9e
Make FnAllocState contain vectors of AllocInfo, instead of LLVM Constants.
...
llvm-svn: 9450
2003-10-23 20:32:02 +00:00
8e766c7ab3
New file, containing AllocInfo structure.
...
llvm-svn: 9449
2003-10-23 20:31:51 +00:00
88df876012
* Eliminate `using' directive
...
* Fix order of #includes
* Make code layout more consistent
* Eliminate extraneous whitespace and comment-lines
llvm-svn: 9433
2003-10-23 18:10:02 +00:00
dc07775d58
* Fix order of #include files
...
* Doxygen-ify method comments
llvm-svn: 9432
2003-10-23 18:06:27 +00:00
0b624fefb7
* Order #includes as per style guide
...
* Doxygen-ify comments
* Make code layout more consistent
llvm-svn: 9431
2003-10-23 18:03:50 +00:00
28ba80e648
* Use C++ style comments instead of C-style
...
* Make file description more readable
* Make code layout more consistent, include comment in assert so it's visible
during execution if it hits
llvm-svn: 9430
2003-10-23 18:02:47 +00:00
7d56d2c6fb
* Eliminate `using' directive
...
* Make code layout more consistent
llvm-svn: 9427
2003-10-23 17:43:17 +00:00
c7b1bce283
Make code layout more consistent.
...
llvm-svn: 9426
2003-10-23 17:39:37 +00:00
f140b28c16
Change the type of FnAllocState.
...
llvm-svn: 9388
2003-10-22 20:44:29 +00:00
41fe18cbaa
Don't worry about converting each function's reg. alloc. state into One Big
...
Constant early on, because we can do it in doFinalization.
Tighten up a comment.
llvm-svn: 9387
2003-10-22 20:44:23 +00:00
f29231ec3a
Add prototype for verifySavedState().
...
llvm-svn: 9386
2003-10-22 20:23:13 +00:00
e3cf072d9e
Doxygenify method comments.
...
Try to improve method comments a little.
Get rid of some excess whitespace; put braces on previous line when possible.
Add stub for method to verify the work of saveState().
llvm-svn: 9385
2003-10-22 20:22:53 +00:00
9583cfafc5
Added LLVM copyright notice.
...
llvm-svn: 9324
2003-10-21 15:29:18 +00:00
29265fe981
Added LLVM copyright header.
...
llvm-svn: 9321
2003-10-21 15:17:13 +00:00
4436c49787
Added LLVM copyright notice to Makefiles.
...
llvm-svn: 9312
2003-10-20 22:26:57 +00:00
482202a601
Added LLVM project notice to the top of every C++ source file.
...
Header files will be on the way.
llvm-svn: 9298
2003-10-20 19:43:21 +00:00
b94550e537
Change the Opcode enum for PHI nodes from "Instruction::PHINode" to "Instruction::PHI" to be more consistent with the other instructions.
...
llvm-svn: 9269
2003-10-19 21:34:28 +00:00
9177d11367
#include vector which we will need here soon
...
llvm-svn: 9144
2003-10-15 22:09:32 +00:00
f95d9b99b3
Decrease usage of use_size()
...
llvm-svn: 9135
2003-10-15 16:48:29 +00:00
44d2c3514a
Regularize header file comments
...
llvm-svn: 9071
2003-10-13 03:32:08 +00:00
80f283b316
* Doxygenified comments
...
* Wrap code at 80 columns
* Ordered includes according to LLVM style guide
llvm-svn: 9020
2003-10-10 17:41:32 +00:00
5f1f337d95
Change MRegisterDesc::AliasSet, TargetInstrDescriptor::ImplicitDefs
...
and TargetInstrDescriptor::ImplicitUses to always point to a null
terminated array and never be null. So there is no need to check for
pointer validity when iterating over those sets. Code that looked
like:
if (const unsigned* AS = TID.ImplicitDefs) {
for (int i = 0; AS[i]; ++i) {
// use AS[i]
}
}
was changed to:
for (const unsigned* AS = TID.ImplicitDefs; *AS; ++AS) {
// use *AS
}
llvm-svn: 8960
2003-10-08 05:20:08 +00:00
5facafaabe
Moved enum and command-line option in separate file. Also added function that returns the user selected register allocator to the caller.
...
llvm-svn: 8819
2003-10-02 16:57:49 +00:00
1f8d21e233
include passes.h which defines the interface this file exposes
...
llvm-svn: 8793
2003-09-30 20:13:59 +00:00
974bc6682e
Update head-of-file comment.
...
llvm-svn: 8699
2003-09-24 18:16:23 +00:00
1542a8b820
Untabify tabs in stuff I've recently added.
...
Check in my register allocator state-saving code.
llvm-svn: 8698
2003-09-24 18:08:54 +00:00
82585e030c
Use getRegClassID() instead of getRegClass()->getID(), since it's there.
...
Shorten the markSuggestedColorUsable method.
Add a switch for saving reg. alloc. state (coming soon).
llvm-svn: 8697
2003-09-24 17:50:28 +00:00
50364030ca
Remove some unused methods of class IGNode.
...
llvm-svn: 8696
2003-09-24 04:29:52 +00:00
6b379da6c3
Move getAnalysisUsage method from header to .cpp file. Add a normal file
...
header comment
llvm-svn: 8679
2003-09-23 15:13:04 +00:00
e383a14960
Use C++ math header instead of C version.
...
llvm-svn: 8648
2003-09-21 03:57:37 +00:00
32cd554853
Erase now-unused prototypes.
...
llvm-svn: 8647
2003-09-21 02:51:00 +00:00
20c888fa9f
Rearrange #includes ... since there are fewer now I guess it's a win.
...
(I also zapped printMachineCode() and printLabel() at the previous checkin,
but forgot to mention it.)
llvm-svn: 8646
2003-09-21 02:50:21 +00:00
3a0a5fc1b3
Standardize the names of include guards.
...
llvm-svn: 8645
2003-09-21 02:31:37 +00:00
58dabb4406
Standardize the names of include guards.
...
Remove more excess whitespace.
llvm-svn: 8644
2003-09-21 02:31:25 +00:00
73d10dc47b
Standardize the names of include guards.
...
Fix typos in file header comment.
llvm-svn: 8643
2003-09-21 02:31:15 +00:00
43593b8cd0
I tried to standardize the formatting and tidy up the huge amount of
...
excess whitespace a little. Also improved some comments.
llvm-svn: 8642
2003-09-21 02:24:09 +00:00
e1061018bf
Convert PhyRegAlloc into a proper pass.
...
PhyRegAlloc.cpp:
Don't include TargetMachine.h or TargetRegInfo.h, because these are provided
by PhyRegAlloc.h.
Merge class RegisterAllocator into class PhyRegAlloc.
Simplify & move ctor, dtor to PhyRegAlloc.h.
Make some of PhyRegAlloc's reference members into pointer members,
so they can be more easily messed with.
MarkAllocatedRegs() becomes a member method, with fewer args.
PhyRegAlloc.h:
Include Pass.h, TargetMachine.h and TargetRegInfo.h. Don't declare
TargetRegInfo forward.
Give AddedInstrns the obvious clear() method.
Make some of PhyRegAlloc's reference members into pointer members,
so they can be more easily messed with.
Add prototype for markAllocatedRegs().
Remove unused inline void constructLiveRanges().
llvm-svn: 8641
2003-09-21 01:23:46 +00:00
02fe6b7683
Fixed spelling.
...
llvm-svn: 8588
2003-09-17 21:34:23 +00:00
666b18f1a6
Fix typo in comment. Take out some random whitespace.
...
(Partial merge from my working file)
llvm-svn: 8564
2003-09-16 15:38:05 +00:00
c8a9ec01b6
Edit comment for accuracy
...
llvm-svn: 8562
2003-09-16 15:36:50 +00:00
8579a9a38c
Add flag to control whether or not delay slots are filled during
...
instruction scheduling (this is off by default).
llvm-svn: 8553
2003-09-16 05:55:15 +00:00
75ed4b8831
Fix typos in comments.
...
llvm-svn: 8523
2003-09-15 05:28:42 +00:00
acda7df68b
Fixed spelling and grammar.
...
llvm-svn: 8489
2003-09-11 22:34:13 +00:00
5718a6bf99
Don't build dead directories
...
llvm-svn: 8308
2003-09-01 20:34:15 +00:00
c87312a858
Remove dead library makefile
...
llvm-svn: 8304
2003-09-01 20:29:43 +00:00
a5b78c68d9
Remove makefile for dead library
...
llvm-svn: 8303
2003-09-01 20:26:52 +00:00
eefb565449
LiveRange.h is now in lib/CodeGen/RegAlloc
...
llvm-svn: 8299
2003-09-01 20:17:13 +00:00
e80612a28e
LiveRangeInfo got moved into the lib/CodeGen/RegAlloc directory
...
llvm-svn: 8297
2003-09-01 20:12:17 +00:00
f1ab45bdf5
PhyRegAlloc.h got moved to lib/CodeGen/RegAlloc
...
llvm-svn: 8296
2003-09-01 20:09:04 +00:00
7127065f24
Move IGNode from public include directory to here. Minor cleanups like adding std:: namespace qualifiers
...
llvm-svn: 8295
2003-09-01 20:05:47 +00:00
a4b09fe071
Fixed two double free bugs that caused llc to segfault or run forever.
...
llvm-svn: 8191
2003-08-28 21:43:17 +00:00
190b7a86ba
Removing README
...
llvm-svn: 8180
2003-08-28 17:17:59 +00:00
7efb18f49c
Putting my revised version of ModuloScheduling in cvs. This is not complete...
...
llvm-svn: 8179
2003-08-28 17:12:14 +00:00
89860151b9
Moved index into BB to common graph class because its needed by ModuloSchedGraph.
...
llvm-svn: 8174
2003-08-28 15:30:40 +00:00
cf8851eb20
Added/removed header file
...
llvm-svn: 8160
2003-08-27 15:12:24 +00:00
9af699b885
*** empty log message ***
...
llvm-svn: 8153
2003-08-27 02:42:58 +00:00
cc85d4544f
First version of SchedGraph common class and refactoring of SchedGraph.
...
llvm-svn: 8148
2003-08-25 22:42:20 +00:00
e6235443a5
Fix bug: Jello/2003-08-23-RegisterAllocatePhysReg.ll
...
llvm-svn: 8095
2003-08-23 23:49:42 +00:00
be372b91e1
The word `dependent' has no `a'.
...
llvm-svn: 8030
2003-08-21 22:14:26 +00:00
a73b95821a
Fix spello
...
llvm-svn: 8029
2003-08-21 22:05:57 +00:00
7eb05a170a
Spell `necessary' correctly.
...
llvm-svn: 7944
2003-08-18 14:43:39 +00:00
931947db18
Fix bug: Jello/2003-08-15-AllocaAssertion.ll
...
llvm-svn: 7916
2003-08-17 18:01:15 +00:00
91e16e750b
Fix typo in comment
...
llvm-svn: 7906
2003-08-15 21:19:25 +00:00
3b5b633c77
Remove uses of the NonCopyable class, to make the doxygen output look better
...
llvm-svn: 7880
2003-08-15 05:20:06 +00:00
0605c232b7
rename selection directory and library to SelectionDAG
...
llvm-svn: 7877
2003-08-15 04:55:22 +00:00
e81de41edf
Add a bunch of new node types, etc
...
llvm-svn: 7875
2003-08-15 04:53:16 +00:00
8c14ba96ca
Factory methods for function passes now return type FunctionPass *.
...
llvm-svn: 7839
2003-08-14 06:09:32 +00:00
cbd3a40626
Factory methods for function passes now return type FunctionPass *.
...
Get rid of RegisterLLC, which can't handle FunctionPasses anyway.
llvm-svn: 7836
2003-08-14 06:04:49 +00:00
89207943a1
Factory methods for FunctionPasses now return type FunctionPass *.
...
llvm-svn: 7823
2003-08-13 18:18:15 +00:00
bb9be9ddbc
Mapping directory no longer exists
...
llvm-svn: 7801
2003-08-13 02:37:24 +00:00
e9643bb118
Obsolete file
...
llvm-svn: 7799
2003-08-13 02:27:13 +00:00
7dc5b6707c
For instructions in a delay slot of another instruction,
...
we no longer need to find the live-before set of the delayed
branch since that set is now included the live-before/after
set of the instructions in each delay slot. Just assert that instead.
llvm-svn: 7796
2003-08-12 22:22:24 +00:00
2c2062cdba
Build the SelectionDAG library
...
llvm-svn: 7718
2003-08-11 14:57:48 +00:00
600d308853
Initial checkin of SelectionDAG implementation. This is still rough and
...
unfinished
llvm-svn: 7717
2003-08-11 14:57:33 +00:00
da92f366c7
Fix assertion in MachineInstr::substituteValue().
...
llvm-svn: 7675
2003-08-07 15:01:48 +00:00
30e987470f
Use a new local data structure instead of the MachineInstr::regsUsed set
...
llvm-svn: 7621
2003-08-05 22:11:13 +00:00
92f5fb598c
Add a map
...
llvm-svn: 7620
2003-08-05 22:09:31 +00:00
e62a2a76e5
Minor cleanups
...
llvm-svn: 7619
2003-08-05 22:03:27 +00:00
b05d3508d6
Physical registers no longer live in the regsUsed set for each machine instr
...
llvm-svn: 7618
2003-08-05 21:55:58 +00:00
020b544cbc
Do not insert physical regsiters into the regsUsed set
...
llvm-svn: 7617
2003-08-05 21:55:20 +00:00
cd4f4320b0
All callers of these methods actually wanted them to preserve the flags,
...
so get rid of the def/use parameters that were getting passed in.
**** This now changes the semantics of these methods to preserve the flags,
not clobber them!
llvm-svn: 7602
2003-08-05 16:58:46 +00:00
92a199dca7
Fix bugs handling ESP in alloca references
...
llvm-svn: 7591
2003-08-05 04:13:58 +00:00
506fa6843e
Revert previous change, and be really anal about what physical registers can do.
...
llvm-svn: 7588
2003-08-05 00:49:09 +00:00
4b637cc666
Don't bother calculating info unless its needed. May reduce number of stack slots created.
...
llvm-svn: 7584
2003-08-04 23:42:37 +00:00
815b85e3ba
* Fix spelling of 'necessary'
...
* Add a lot more DEBUG output, which is better structured than before
* Fix bug: Jello/2003-08-04-PhysRegLiveFailure.llx
llvm-svn: 7583
2003-08-04 23:36:39 +00:00
41a894de77
Simplify code, eliminating the need for the X86 isVoid target instr flag
...
llvm-svn: 7534
2003-08-03 21:51:45 +00:00
74e4e9b44f
Set debug types
...
llvm-svn: 7533
2003-08-03 21:47:31 +00:00
1789d23990
Remove using decl
...
llvm-svn: 7531
2003-08-03 20:24:29 +00:00
6cce665888
Wrap at 80 columns
...
llvm-svn: 7503
2003-08-03 13:49:03 +00:00
1007f033d4
Move DEBUG to Debug.h
...
llvm-svn: 7497
2003-08-01 22:21:34 +00:00
9143f1962e
All constant-evaluation code now unified into
...
TargetInstrInfo::ConvertConstantToIntType().
llvm-svn: 7390
2003-07-29 19:50:12 +00:00
c9cb319bcb
1. Bug fix: Don't use branch operand reg. as temp. reg. when
...
spilling values used by an instruction in the delay slot of the branch
(which will eventually be moved before the branch).
2. Bug fix: Delete the delay slot instr, not the branch instr, when
moving delay slot instr. out!!!!
3. Move code to insert caller-saves moved here from SparcRegInfo:
it is now machine-independent.
llvm-svn: 7389
2003-07-29 19:49:21 +00:00
e2ef34a818
Add const version of getLiveRangeForValue().
...
llvm-svn: 7386
2003-07-29 19:38:22 +00:00
91e75d87d2
Code to insert caller-saves moved here from SparcRegInfo: it is now
...
machine-independent.
Fix problem with using branch operand reg. as temp. reg. when
spilling values used by an instruction in the delay slot of the branch
(which will eventually be moved before the branch).
llvm-svn: 7385
2003-07-29 19:37:41 +00:00
0c8de4bfca
Making this code const-correct would be a pain, so I'll hack it.
...
llvm-svn: 7350
2003-07-26 23:29:51 +00:00
414832fea6
Const correctness fixes
...
llvm-svn: 7349
2003-07-26 23:24:56 +00:00
0ed86aca71
Be const correct
...
llvm-svn: 7348
2003-07-26 23:23:41 +00:00
1316383267
Hrm, another necesary one :(
...
llvm-svn: 7347
2003-07-26 23:22:19 +00:00
824398ec6d
Remove #include
...
llvm-svn: 7342
2003-07-26 23:01:04 +00:00
981e585021
Remove extraneous #includes
...
llvm-svn: 7341
2003-07-26 23:00:29 +00:00
45766ab682
(1) Change the way unused regs. are marked and found to consider regType
...
info (since multiple reg types may share the same reg class).
(2) Remove machine-specific regalloc. methods that are no longer needed.
In particular, arguments and return value from a call do not need
machine-specific code for allocation.
(3) Rename TargetRegInfo::getRegType variants to avoid unintentional
overloading when an include file is omitted.
llvm-svn: 7329
2003-07-25 21:06:09 +00:00
abcd8d75ff
Remove unused field. Change the way unused regs. are marked and
...
found to consider regType info (since multiple reg types may share
the same reg class, e.g., single and double on Sparc).
llvm-svn: 7327
2003-07-25 21:00:13 +00:00
79f22fe02f
Remove unnecessary casts
...
llvm-svn: 7250
2003-07-23 15:17:51 +00:00
b976da9ecf
Random cleanups
...
llvm-svn: 7247
2003-07-23 14:59:40 +00:00
0470412961
Remove using decl
...
llvm-svn: 7246
2003-07-23 14:55:59 +00:00
e2e50f2880
Values stored in CallArgsDescriptor cannot be const.
...
llvm-svn: 7156
2003-07-10 19:46:15 +00:00
abf331db03
isMarkedForSpill() should be const.
...
llvm-svn: 7155
2003-07-10 19:45:28 +00:00
689adb19b0
Change interface to MachineInstr::substituteValue to specify more precisely
...
which args can be substituted: defsOnly, defsAndUses or usesOnly.
llvm-svn: 7154
2003-07-10 19:45:07 +00:00
39587d6264
Print out all neighbors in interference graph, not just higher-numbered ones.
...
llvm-svn: 7153
2003-07-10 19:43:33 +00:00
5224b19deb
Several fixes to handling of int CC register:
...
(1) An int CC live range must be spilled if there are any interferences,
even if no other "neighbour" in the interf. graph has been allocated
that reg. yet. This is actually true of any class with only one reg!
(2) SparcIntCCRegClass::colorIGNode sets the color even if the LR must
be spilled so that the machine-independent spill code doesn't have to
make the machine-dependent decision of which CC name to use based on
operand type: %xcc or %icc. (These are two halves of the same
register.)
(3) LR->isMarkedForSpill() is no longer the same as LR->hasColor().
These should never have been the same, and this is necessary now for #2 .
(4) All RDCCR and WRCCR instructions are directly generated with the
phony number for %ccr so that EmitAssembly/EmitBinary doesn't have to
deal with this.
llvm-svn: 7152
2003-07-10 19:42:55 +00:00
3bb921e8df
Choose register instead of immediate for ConstantExpr in ChooseRegOrImmed.
...
llvm-svn: 7112
2003-07-06 20:33:21 +00:00
1fce4cfa95
Minor beautification: fold a couple of lines of code.
...
llvm-svn: 7054
2003-07-02 01:24:00 +00:00
fa1dde06aa
A def. operand of a machine instruction may be an ordinary Value*,
...
not just an Instruction*, at least in one unfortunate case:
the first operand to the va_arg instruction.
Modify ValueToDefVecMap to map from Value*, not Instruction*.
llvm-svn: 7052
2003-07-02 01:16:01 +00:00
3ef61afb76
Merged in autoconf branch. This provides configuration via the autoconf
...
system.
llvm-svn: 7014
2003-06-30 21:59:07 +00:00
52de05c6b3
Remove a ton of extraneous #includes
...
llvm-svn: 6842
2003-06-22 03:08:05 +00:00
55491774bb
Actually, change it to use explicit new/delete, which is more likely to be
...
optimized INTO an alloca
llvm-svn: 6727
2003-06-16 22:29:09 +00:00
5b7e3cae42
Remove two using decls
...
Remove usage of alloca
llvm-svn: 6725
2003-06-16 22:18:28 +00:00
7a719ed20c
Isolate machine-dependent use of <alloca.h> in "Support/Alloca.h",
...
so that we can easily change its use to be conditional on the result of
an autoconf test later.
llvm-svn: 6723
2003-06-16 21:54:01 +00:00
cfac736363
Included assert.h so that the code compiles under newer versions of GCC.
...
llvm-svn: 6682
2003-06-11 14:01:36 +00:00
c40f66c928
add some comments
...
add a function ModuloScheduling::dumpFinalSchedule() to print out final schedule
llvm-svn: 6677
2003-06-10 20:04:30 +00:00
f6b88e55ed
add an brief instruction what this pass is
...
llvm-svn: 6676
2003-06-10 20:03:39 +00:00
d2656536f5
a simple introduction to this pass
...
llvm-svn: 6675
2003-06-10 20:02:16 +00:00
9766f8c3a2
cleaned code
...
add some comments
llvm-svn: 6674
2003-06-10 19:09:00 +00:00
2ee8c115d8
delete useless functions
...
add comment
llvm-svn: 6673
2003-06-08 23:16:07 +00:00
1ecd0e0228
change DEBUG to DEBUG_PRINT
...
llvm-svn: 6672
2003-06-08 20:40:47 +00:00
366494ab0d
Do not hastily change the Opcode from 'r' to 'i' type if we're not actually
...
SETTING the operand to be an immediate or have verified that one of the operands
is really a SignExtended or Unextended immediate value already, which warrants
an 'i' opcode.
llvm-svn: 6662
2003-06-07 02:34:43 +00:00
a7c5e0fba3
Fix bug: Jello/2003-06-04-bzip2-bug.ll
...
llvm-svn: 6624
2003-06-05 17:15:04 +00:00
4e7bad01ff
I have finally seen the light. The code to change the opcode must live higher in
...
the loop, and in both cases. In the first case, it is a VReg that is a constant
so it may be actually converted to a constant. In the second case, it is already
a constant, but then if it doesn't change its type (e.g. to become a register
and have the value loaded from memory if it is too large to live in its
instruction field), we must change the opcode BEFORE the 'continue', otherwise
we miss the opportunity.
llvm-svn: 6602
2003-06-04 04:54:06 +00:00
a6c3f896da
Pass through the emitConstantPool() call to the real emitter.
...
llvm-svn: 6590
2003-06-03 20:00:49 +00:00
0cf667165e
Moved code to modify the opcode from 'reg' to 'imm' form to a more logical place.
...
llvm-svn: 6563
2003-06-03 03:18:20 +00:00
e7021ad033
Moved FInfo.cpp to lib/Target/Sparc as it is Sparc-specific.
...
llvm-svn: 6554
2003-06-02 23:27:09 +00:00
17776f432e
Minor cleanups.
...
This pass should be moved to lib/Target/Sparc since it's sparc specific
It also needs a file comment.
llvm-svn: 6553
2003-06-02 22:57:41 +00:00
396680793c
Remove usage of noncopyable classes to clean up doxygen output.
...
In particular these classes are the last that link the noncopyable classes
with the hash_map, vector, and list classes.
llvm-svn: 6552
2003-06-02 22:45:07 +00:00
a0a3ef8d21
Add #include
...
llvm-svn: 6550
2003-06-02 22:05:13 +00:00
155bdf6993
Removed a useless ofstream.
...
llvm-svn: 6547
2003-06-02 20:49:09 +00:00
8dfdb0f68e
compiled with the new SchedGraphCommon
...
llvm-svn: 6545
2003-06-02 17:48:56 +00:00
6fd0681010
Remove spurious assert()
...
llvm-svn: 6529
2003-06-02 04:10:41 +00:00
0c1475caf0
Changes to be compatible with MachineCodeEmitter.h
...
llvm-svn: 6515
2003-06-01 23:22:11 +00:00
24ce4d8eb8
Minor changes.
...
llvm-svn: 6470
2003-05-31 07:41:54 +00:00
ad83684c77
Added MachineCodeForInstruction object as an argument to
...
TmpInstruction constructors because every TmpInstruction object has
to be registered with a MachineCodeForInstruction to prevent leaks.
This simplifies the user's code.
llvm-svn: 6469
2003-05-31 07:41:24 +00:00
c468882155
Allow explicit physical registers for implicit operands.
...
llvm-svn: 6468
2003-05-31 07:39:06 +00:00
465f9b6738
Changes to allow explicit physical register arguments that have been
...
preallocated. While reg-to-reg dependences were already handled, this
change required new code for adding edges to/from call instructions.
This was part of the extensive changes to the way code generation occurs
for function call arguments and return values.
See log for CodeGen/PhyRegAlloc.cpp.
llvm-svn: 6467
2003-05-31 07:37:05 +00:00
a83804a29a
Extensive changes to the way code generation occurs for function
...
call arguments and return values:
Now all copy operations before and after a call are generated during
selection instead of during register allocation.
The values are copied to virtual registers (or to the stack), but
in the former case these operands are marked with the correct physical
registers according to the calling convention.
Although this complicates scheduling and does not work well with
live range analysis, it simplifies the machine-dependent part of
register allocation.
llvm-svn: 6465
2003-05-31 07:32:01 +00:00
736e6172dc
When converting virtual registers to immediate constants, change the opcode.
...
llvm-svn: 6452
2003-05-30 20:36:27 +00:00
94908b010e
Added saveBBreferences() for BasicBlock resolution.
...
llvm-svn: 6451
2003-05-30 20:32:45 +00:00
856ee9154f
so far everything compiles
...
llvm-svn: 6423
2003-05-30 00:17:09 +00:00
df88104198
Correctly write out binary data as chars, before they're cast to ints.
...
llvm-svn: 6385
2003-05-28 18:27:19 +00:00
cbd4678663
Added a debugging code emitter that prints code to a file, debug to std::cerr,
...
and passes the real code to a memory-outputting code emitter. This may be
removed at a later point in development.
llvm-svn: 6379
2003-05-27 22:43:19 +00:00
7366fa1aa6
(1) Added special register class containing (for now) %fsr.
...
Fixed spilling of %fcc[0-3] which are part of %fsr.
(2) Moved some machine-independent reg-class code to class TargetRegInfo
from SparcReg{Class,}Info.
(3) Renamed MachienOperand::opIsDef to MachineOperand::opIsDefOnly()
and related functions and flags. Fixed several bugs where only
"isDef" was being checked, not "isDefAndUse".
llvm-svn: 6341
2003-05-27 00:05:23 +00:00
7ca74ef252
Cleaned up code layout. No functional changes.
...
llvm-svn: 6304
2003-05-22 21:49:18 +00:00
b674a1b95b
Kill `using' directives.
...
llvm-svn: 6301
2003-05-22 21:24:35 +00:00
1103e8349d
Use a kill, not a dead definition, update comment
...
llvm-svn: 6131
2003-05-12 17:37:30 +00:00
51ae817fd6
* Keep LiveVariable information more up-to-date and consistent
...
* *** Finally mark values that are inputs to PHIs as killed when appropriate.
This should make the generated code quite a bit better. For example, the
local-ra will not have to spill PHI inputs at the end of predecessor BB's
anymore.
llvm-svn: 6117
2003-05-12 14:28:28 +00:00
2e50ac75a0
Fix bug where we could iterate off the end of a basic block
...
llvm-svn: 6116
2003-05-12 14:26:38 +00:00
584bae4733
* Keep the BBMap around as long as the pass is live
...
* Change getVarInfo to take real virtual register numbers and offset them
itself. This has caused me so much grief, it's not even funny.
llvm-svn: 6115
2003-05-12 14:24:00 +00:00
bd854dafec
Fix N^2 algorithm
...
llvm-svn: 6112
2003-05-12 04:08:54 +00:00
00ee7cfa83
* Fix several comments
...
* Update LiveVar info better, fixing bug: Jello/2003-05-11-PHIRegAllocBug.ll
llvm-svn: 6110
2003-05-12 03:55:21 +00:00
5a78ee85c6
Fix tab infestation!
...
llvm-svn: 6109
2003-05-12 03:54:14 +00:00
2274c71150
Allow const functions
...
llvm-svn: 6056
2003-05-09 03:27:41 +00:00
c9a4f4c6b4
Add methods for stub function generation
...
llvm-svn: 6054
2003-05-08 21:54:18 +00:00
5ab42e5739
Add a vector to keep track of which registers are allocatable. Remove FIXMEs
...
llvm-svn: 6015
2003-05-07 20:08:36 +00:00
9eb2172176
Re-add gross hack, it's still necessary. :(
...
llvm-svn: 6012
2003-05-06 21:44:54 +00:00
824698b891
Remove hideously nasty hack
...
llvm-svn: 6011
2003-05-06 21:32:39 +00:00
e842da3dcc
Debug output should go to cerr, not cout, because that's where bytecode goes.
...
llvm-svn: 6002
2003-05-04 22:51:30 +00:00
f22d1f5912
Fix a bug which occurred with empty basic blocks
...
llvm-svn: 5982
2003-05-02 18:44:42 +00:00
f641fd08bc
Minor cleanup
...
llvm-svn: 5976
2003-05-01 21:18:47 +00:00
6ee2cf5d89
Remove unneccesary &*
...
llvm-svn: 5871
2003-04-23 16:36:11 +00:00
3b78995848
Just some code beautification changes I had sitting around in my tree.
...
llvm-svn: 5859
2003-04-22 23:00:08 +00:00
a45606276d
Fixed compilation errors, command-line argument declarations, cleaned up code to
...
look nicer and removed useless stuff.
Also renamed a few variables, moved them into namespaces, converted outputting
to a file into a print to std::cerr with a DEBUG() guard, as all passes should
do anyway.
No functional changes have been made. However, this code now compiles.
llvm-svn: 5769
2003-04-10 19:19:23 +00:00
218a732724
Made the code readable:
...
* Lines must be wrapped at 80 chars. This is a hard limit.
* Consistent style on functions, braces, if, for, etc. Code must be readable.
No functional changes have been made, even though I added a new typedef.
llvm-svn: 5768
2003-04-09 21:51:34 +00:00
b250dc6909
change the include file names and some class names to make it compile
...
llvm-svn: 5764
2003-04-06 23:56:19 +00:00
45d8f3279e
*** empty log message ***
...
llvm-svn: 5755
2003-03-27 17:57:44 +00:00
eb45c982ae
Print machine frame objects with the frame offset intrinsic to the machine
...
llvm-svn: 5329
2003-01-16 18:35:57 +00:00
176866caed
Fix problems with empty basic blocks
...
llvm-svn: 5326
2003-01-16 18:06:43 +00:00
c52c791806
Arg, fix bugs in previous checkin...
...
llvm-svn: 5322
2003-01-16 02:24:20 +00:00
910ee768d0
Add assertion
...
llvm-svn: 5321
2003-01-16 02:22:08 +00:00
86ee825bce
* Insert prolog/epilog code before rewriting indexes
...
* Fix calculation of frame offsets when there is an offset.
llvm-svn: 5318
2003-01-15 22:52:34 +00:00
dea36ca100
Move sparc specific code into the Sparc backend
...
llvm-svn: 5317
2003-01-15 21:36:50 +00:00
1ff57d914c
Adjust to new interfaces
...
llvm-svn: 5314
2003-01-15 21:14:01 +00:00
e46165fcf0
Move headers around
...
llvm-svn: 5312
2003-01-15 21:02:16 +00:00
14802a539d
Header is moved into local directory
...
llvm-svn: 5311
2003-01-15 21:00:02 +00:00
5f738161ae
Fix bug in previous checkin
...
llvm-svn: 5310
2003-01-15 20:32:15 +00:00
c75dc4856e
Add new method
...
llvm-svn: 5309
2003-01-15 20:28:36 +00:00
a23969b669
#include RegClass.h explicitly
...
llvm-svn: 5307
2003-01-15 19:57:07 +00:00
19a7cb2240
Remvoe dependency on RegClass.h
...
llvm-svn: 5306
2003-01-15 19:56:21 +00:00
d840ccd2e0
Prune #includes
...
llvm-svn: 5303
2003-01-15 19:48:13 +00:00
46d4d231c5
Minor changes
...
llvm-svn: 5302
2003-01-15 19:47:53 +00:00
5da071b265
Remove obsolete ctor
...
llvm-svn: 5301
2003-01-15 19:47:02 +00:00
4f7088f6a2
Remove dead code
...
llvm-svn: 5298
2003-01-15 19:22:38 +00:00
8128936c33
Use buildmi not MI ctor directly
...
llvm-svn: 5293
2003-01-15 18:08:07 +00:00
24c1d5e551
Rename llvm/Analysis/LiveVar/FunctionLiveVarInfo.h -> llvm/CodeGen/FunctionLiveVarInfo.h
...
llvm-svn: 5284
2003-01-14 23:05:08 +00:00
de1d729747
Move llvm/Analysis/LiveVar/ValueSet.h to CodeGen/ValueSet.h
...
llvm-svn: 5282
2003-01-14 22:56:37 +00:00
b4d58d7f9e
Rename MachineInstrInfo -> TargetInstrInfo
...
llvm-svn: 5272
2003-01-14 22:00:31 +00:00
cab0b442f2
New files
...
llvm-svn: 5262
2003-01-13 20:01:16 +00:00
cbedb8b400
* Use the PHI Elimination pass
...
llvm-svn: 5220
2003-01-13 00:26:08 +00:00
bfa5319eb2
* Convert to use LiveVariable analysis
...
* Convert to use PHIElimination pass
* Don't spill values which have just been reloaded (big win reducing spills)
* Add experimental support for eliminating spills before TwoAddress
instructions. It currently is broken so it is #ifdef'd out.
* Use new "is terminator" flag on instructions instead of looking for
branches and returns explicitly.
llvm-svn: 5219
2003-01-13 00:25:40 +00:00
8d2a07ab2f
Convert to MachineFunctionPass
...
llvm-svn: 5218
2003-01-13 00:23:41 +00:00
a2ad874c95
Add support for 3 new forms of MachineOperand
...
llvm-svn: 5217
2003-01-13 00:23:24 +00:00
c6807e8f5d
Add support for constant pool
...
Add helper methods for MachineFrameInfo
llvm-svn: 5216
2003-01-13 00:23:03 +00:00
6178ee9b36
Add support for global address by string and constant pool values
...
llvm-svn: 5215
2003-01-13 00:22:37 +00:00
f9781b59ab
More renamings of Target/Machine*Info to Target/Target*Info
...
llvm-svn: 5204
2002-12-29 03:13:05 +00:00
42d59219c7
Rename MachineOptInfo to TargetoptInfo
...
Rename MachineCacheInfo to TargetCacheInfo
llvm-svn: 5203
2002-12-29 02:50:35 +00:00
ca4362fee7
Rename FunctionFrameInfo to MachineFrameInfo
...
llvm-svn: 5200
2002-12-28 21:08:26 +00:00
871e591e34
Rename MachineFrameInfo to TargetFrameInfo.h
...
llvm-svn: 5199
2002-12-28 21:00:25 +00:00
c8b36e6362
Initial checkin of Prolog/Epilog code inserter, which is an important part
...
of the abstract frame representation
llvm-svn: 5198
2002-12-28 20:43:30 +00:00
bf9d12ac8b
* Convert to be a MachineFunctionPass instance
...
* Use new FunctionFrameInfo object to manage stack slots instead of doing
it directly
* Adjust to new MRegisterInfo API
* Don't take a TM as a ctor argument
* Don't keep track of which callee saved registers are modified
* Don't emit prolog/epilog code or spill/restore code for callee saved regs
* Use new allocation_order_begin/end iterators to simplify dramatically the
logic for picking registers to allocate
* Machine PHI nodes can no longer contain constant arguments
* Use a bitvector to keep track of registers used instead of a set
* Fix problem where explicitly referenced registers would be added to
regsused set and never removed
llvm-svn: 5196
2002-12-28 20:42:14 +00:00
b4e4111d75
* Convert to be a MachineFunctionPass instance
...
* Use new FunctionFrameInfo object to manage stack slots instead of doing
it directly
* Adjust to new MRegisterInfo API
* Don't take a TM as a ctor argument
* Don't keep track of which callee saved registers are modified
* Don't emit prolog/epilog code or spill/restore code for callee saved regs
* Use new allocation_order_begin/end iterators to simplify dramatically the
logic for picking registers to allocate
* Machine PHI nodes can no longer contain constant arguments
llvm-svn: 5195
2002-12-28 20:40:43 +00:00
fd1ecadb1d
* Add printing support for FrameIndex operands
...
llvm-svn: 5194
2002-12-28 20:37:37 +00:00
32525647e1
* A bunch of functionality and data was removed from MachineFunction and put
...
into a new MachineFunctionInfo class
* Implement new FunctionFrameInfo class
llvm-svn: 5193
2002-12-28 20:37:16 +00:00
0733616ec7
Frame info moved out of MachineFunction into a seperate object
...
llvm-svn: 5192
2002-12-28 20:35:34 +00:00
42714ec1bd
Adjust to simpler spill interface
...
Only spill and reload caller saved registers that are actually modified.
llvm-svn: 5145
2002-12-25 05:05:46 +00:00
ee73450749
Adjustments to work with the simpler spill interface
...
llvm-svn: 5144
2002-12-25 05:04:20 +00:00
448fb45b2d
Remove dependency on SSARegMap.h by MachineFunction.h
...
llvm-svn: 5143
2002-12-25 05:03:22 +00:00
763729c5cd
Substantial fixes to live range handling, fixing several problems, getting
...
strtol to not miscompile, and fixing bug: 2002-12-23-LocalRAProblem.llx
llvm-svn: 5132
2002-12-24 00:04:55 +00:00
095eac8109
Fix compilation on GCC 2.96
...
llvm-svn: 5113
2002-12-23 23:44:04 +00:00
d4627093de
* Fix several register aliasing bugs
...
* Add a new option to eliminate spilling of registers that are only used
within a basic block.
llvm-svn: 5106
2002-12-18 08:14:26 +00:00
dc451c6d27
Implicit defs/uses list may be empty.
...
llvm-svn: 5103
2002-12-18 01:11:14 +00:00
ac5f3b3ed3
Use new reginfo interface
...
llvm-svn: 5099
2002-12-17 04:19:40 +00:00
0ea32b8dd3
Add prolog/epilog spills/reloads to counters
...
Move X86 specific alignment gunk to X86 files
llvm-svn: 5096
2002-12-17 03:16:10 +00:00
4664bd5798
Fix many bugs, regallocator now saves callee-save registers instead of target
...
llvm-svn: 5093
2002-12-17 02:50:10 +00:00
0129b86d55
* Fix a gross X86 hack that was intended to avoid allocating SP and BP
...
* Implement register alias set support
llvm-svn: 5082
2002-12-16 17:44:42 +00:00
1d84f0a461
Keep the stack frame aligned.
...
llvm-svn: 5081
2002-12-16 17:42:40 +00:00
101b8cd9b6
Initial checkin of "local" register allocator. Bugs are still present.
...
llvm-svn: 5078
2002-12-16 16:15:28 +00:00
c63d63a7c7
Rename createSimpleX86RegisterAllocator to createSimpleRegisterAllocator.
...
Remvoe some dead code
llvm-svn: 5070
2002-12-16 14:37:00 +00:00
bc1e6700eb
Some simpliciations to the spill/reload interface
...
llvm-svn: 5067
2002-12-15 23:01:26 +00:00
4e560ee65b
Simplify PHI node elimination significantly by doing it as a prepass to
...
register allocation
llvm-svn: 5066
2002-12-15 22:39:53 +00:00
292083aaf5
Variety of small or trivial simplifications to the code, completely eliminated
...
the dependence on PhysRegClassMap
llvm-svn: 5064
2002-12-15 22:19:19 +00:00
2af545d034
Remove unused savePhysRegToStack method
...
llvm-svn: 5061
2002-12-15 21:33:51 +00:00
ed594b6b20
Localize a map, remove another
...
llvm-svn: 5060
2002-12-15 21:24:30 +00:00
1499e5a92c
Give simple reg allocator a nice Pass Name
...
llvm-svn: 5058
2002-12-15 21:13:12 +00:00
2979a85984
Add a big assert making sure 2 address instructions are formed right
...
llvm-svn: 5057
2002-12-15 21:02:20 +00:00
02e835bf9a
Fix a problem that occurs when PHI nodes have multiple entries for the same predecessor
...
llvm-svn: 5055
2002-12-15 20:48:03 +00:00
dfa238f665
Grab bag of minor cleanups. Export some statistics about the number of
...
spills and reloads emitted
llvm-svn: 5054
2002-12-15 20:36:09 +00:00
f895418b47
Implement printing of MBB arguments
...
llvm-svn: 5053
2002-12-15 20:35:25 +00:00
e2533336f5
Simplify interfaces used by regalloc to insert code
...
llvm-svn: 5052
2002-12-15 20:06:35 +00:00
c1c7cc290f
* Simplify code a bit by breaking the PHI node handling stuff out into a seperate
...
function from normal regalloc code
* Make the regalloc for a block a function instead of part of runOnMachineBB, which
makes it easier to see what's going on in runOnMBB.
llvm-svn: 5051
2002-12-15 19:51:14 +00:00
f2acd842b4
* Remove some unneccesary instance variables
...
* Make allocateStackSpaceFor only allocate the right amount of space
llvm-svn: 5048
2002-12-15 19:07:34 +00:00
b772cd05c5
pull inverse reg class mapping into a class that is sharable and out of the
...
target register description classes.
llvm-svn: 5045
2002-12-15 18:38:59 +00:00
cf1955cb16
Prune #includes
...
llvm-svn: 5044
2002-12-15 18:19:24 +00:00
1af3af463a
Remove extraneous #includes, perform FIXME
...
llvm-svn: 5043
2002-12-15 18:15:24 +00:00
477af9d0fa
Fix borkness with not using MachineBasicBlocks in PHI nodes
...
llvm-svn: 5035
2002-12-15 08:02:51 +00:00
a1aa29b125
Fixed a bug where moves due to phis were being neglected.
...
llvm-svn: 5019
2002-12-13 12:33:31 +00:00
86ca8840a1
Need to insert all moves due to PHI nodes before *ALL* jumps in a predecessor
...
basic block, as there could be multiple.
llvm-svn: 5016
2002-12-13 11:55:59 +00:00
35a358d981
This should be more correct: invalidates physical registers that are used in
...
an instruction to avoid using them to allocate to other virtual registers.
llvm-svn: 5013
2002-12-13 11:33:22 +00:00
89ff3fbcd6
Fixed bug with running out of registers. Also, reinstated namespace which
...
disappeared during the last checkin.
llvm-svn: 5007
2002-12-13 10:42:31 +00:00
a739167305
This should handle register allocating PHI nodes.
...
llvm-svn: 5002
2002-12-13 09:54:36 +00:00
4ef74c8079
Start allocating stack space at [ebp-4] to not overwrite the return address.
...
Also make all loads & stores 4-byte aligned for performance. ;)
llvm-svn: 4982
2002-12-13 04:34:02 +00:00
260dbc79fc
Take advantage of our knowledge of 2-address X86 instructions and
...
register-allocated them appropriately.
llvm-svn: 4976
2002-12-12 23:20:31 +00:00
160a3da184
Added code generation for function prologues and epilogues.
...
llvm-svn: 4930
2002-12-04 23:58:08 +00:00
dbb7b65bf3
Fun arithmetic with iterators aimed at fixing a bug: inserting instructions
...
after the *current* instruction while keeping the iterator in the same
'logical' place.
llvm-svn: 4923
2002-12-04 19:24:45 +00:00
57f055f2f2
Print out direct global references
...
llvm-svn: 4906
2002-12-04 06:44:41 +00:00
a8ad93221a
This should fix the bug seen with some registers not being allocated
...
correctly: skipping instructions by incorrectly incrementing the pointer.
Also adds support for building a reg-to-regclass map, and splits the function
for saving register to stack into two, one suitable for virtual registers
(which also assigns it a physical register) and one for simply storing back
physical registers.
llvm-svn: 4898
2002-12-03 23:15:19 +00:00
bddc6dc5ad
Checkin debug implementation of MCE
...
llvm-svn: 4893
2002-12-03 20:56:42 +00:00
2e035d64d1
* Abstracted out stack space allocation into its own function
...
* Added saving of register values to the stack
llvm-svn: 4858
2002-12-02 21:11:58 +00:00
60286d0916
A simple (spilling) register allocator.
...
llvm-svn: 4828
2002-11-22 22:44:32 +00:00
d5b111a10c
Initialize the SSARegMap.
...
llvm-svn: 4782
2002-11-20 18:55:27 +00:00
d8ea18b695
Print is const!
...
llvm-svn: 4737
2002-11-17 23:22:13 +00:00
17ec8a8dd0
Remove only uses of markDef/markDefAndUse methods
...
llvm-svn: 4719
2002-11-17 22:14:08 +00:00
a2620ac156
Fix warning
...
llvm-svn: 4649
2002-11-09 00:49:43 +00:00
36051c0c56
Move function to cpp file from header
...
llvm-svn: 4510
2002-11-02 22:07:51 +00:00
dcf31cec85
New iostream definitions
...
llvm-svn: 4482
2002-11-01 16:46:05 +00:00
8c7b93f7e3
Restore support for indirect function calls (which briefly wasn't working
...
after I removed annotations on MachineInstr for the CallDescriptor).
llvm-svn: 4469
2002-10-31 15:34:48 +00:00
6c614a9931
Remove fixme
...
llvm-svn: 4447
2002-10-30 02:02:37 +00:00
ac6e97410b
Add special code to make printing SSA form machine instructions nicer
...
llvm-svn: 4446
2002-10-30 01:55:38 +00:00
4e9fb1f52e
Use MRegisterInfo, if available, to print symbolic register names
...
llvm-svn: 4438
2002-10-30 00:58:19 +00:00
214808f8ac
Implement structured machine code printing
...
llvm-svn: 4435
2002-10-30 00:48:05 +00:00
90e64905b9
Make argsize calculation stuff optional, so that Targets without FrameInfo
...
objects yet don't die
llvm-svn: 4427
2002-10-29 23:40:03 +00:00
27ccb70df6
Implement autoinserting ctor
...
llvm-svn: 4426
2002-10-29 23:19:00 +00:00
bbd68ada1a
Rename annotation id
...
llvm-svn: 4425
2002-10-29 23:18:43 +00:00
f4e4ed7612
Merge with sparc backend
...
llvm-svn: 4403
2002-10-29 20:10:58 +00:00
8d3e9ab2cf
X86 merge is complete, eliminate unused code
...
llvm-svn: 4400
2002-10-29 20:07:16 +00:00
a1b4f0f85e
Remove separate vector of implicit refs from MachineInstr, and
...
instead record them as extra operands in the operands[] vector.
Also, move CallArgsDescriptor into this class instead of making it an
annotation on the machine instruction.
llvm-svn: 4399
2002-10-29 19:41:18 +00:00
db6596e551
Move CallArgsDescriptor into this class instead of making it an
...
annotation on the machine instruction.
llvm-svn: 4398
2002-10-29 19:38:46 +00:00
07e26837a9
Move TargetInstrDescriptors extern to the one .cpp file that refers to it:
...
MachineInstr.cpp
llvm-svn: 4392
2002-10-29 17:40:30 +00:00
660bf10981
Use higher level methods, don't use TargetInstrDescriptors directly!
...
llvm-svn: 4389
2002-10-29 17:35:39 +00:00
50ef1010c0
Use higher level method
...
llvm-svn: 4386
2002-10-29 17:25:41 +00:00
76014b97af
Remove #include, misleading comment, and a typedef used only once
...
llvm-svn: 4383
2002-10-29 17:08:05 +00:00
6d6d87f3f3
Inline typedef, eliminate unused method
...
llvm-svn: 4382
2002-10-29 17:03:19 +00:00
ca0f818347
Remove long dead #if 0
...
llvm-svn: 4381
2002-10-29 17:00:19 +00:00
5abe44bb72
Add #includes that were eliminated from headers
...
llvm-svn: 4380
2002-10-29 16:51:05 +00:00
189c099a7f
De-inline methods
...
llvm-svn: 4379
2002-10-29 16:50:33 +00:00
c9e9d2933d
Remove #include
...
llvm-svn: 4378
2002-10-29 16:50:20 +00:00
e9bda57b87
Remove unneeded #include
...
llvm-svn: 4377
2002-10-29 16:50:06 +00:00
a13000449e
Remove forward decl
...
llvm-svn: 4376
2002-10-29 16:49:44 +00:00
7ecc7af4bd
Make assertIGNode be private to the InterferenceGraph.cpp file
...
llvm-svn: 4375
2002-10-29 16:42:34 +00:00
820b037815
MachineInstrInfo no longer #includes this header, so we must
...
llvm-svn: 4366
2002-10-28 23:54:47 +00:00
5c7d638208
Remove all traces of the "Opcode Mask" field in the MachineInstr class
...
llvm-svn: 4359
2002-10-28 21:17:20 +00:00
bee314fc94
Remove more default arguments that are never used
...
llvm-svn: 4358
2002-10-28 21:02:40 +00:00
307fb1a314
Remove default operands that are never used
...
llvm-svn: 4357
2002-10-28 20:59:49 +00:00
ca4a9d20b8
* Make MachineOperand ctors private, so MachineOperand can only be created
...
by MachineInstr.
* Add a bunch of new methods to allow incremental addition of operands to the
machine instr instance.
llvm-svn: 4356
2002-10-28 20:48:39 +00:00
6be5e92526
Replaced uses of deprecated `MachineFunction::get(BasicBlock *BB)'.
...
llvm-svn: 4351
2002-10-28 20:00:31 +00:00
864d279667
Remove two arguments that are never specified
...
llvm-svn: 4348
2002-10-28 19:46:59 +00:00
b1e39b5a27
Rename some regalloc fields
...
llvm-svn: 4346
2002-10-28 19:43:23 +00:00
c9bd2c38a8
Eliminate usage of MachineBasicBlock::get
...
llvm-svn: 4344
2002-10-28 19:22:04 +00:00
76d59276af
Remove usage of MachineBasicBlock::get
...
llvm-svn: 4342
2002-10-28 19:01:16 +00:00
967c38f4c5
Remove usage of MachineBasicBlock::get
...
llvm-svn: 4341
2002-10-28 18:50:08 +00:00
7421df92cb
Eliminate unneccesary use of MachineBasicBlock::get
...
llvm-svn: 4339
2002-10-28 06:01:57 +00:00
ba3a8060ff
s/method/function
...
llvm-svn: 4338
2002-10-28 05:58:46 +00:00
8c63b6897d
Change MachineBasicBlock's to not be Annotations, instead they are kept as
...
part of a linked list tracked by MachineFunction. MachineBasicBlock::get
is now linear time instead of constant time, and thus is deprecated!
llvm-svn: 4337
2002-10-28 05:30:46 +00:00
881d8b3410
Make Scheduling Class variables be 'unsigned' instead of 'int'
...
llvm-svn: 4333
2002-10-28 04:53:02 +00:00
6a30b02b1d
Rename the redundant MachineOperand::getOperandType() to MachineOperand::getType()
...
llvm-svn: 4331
2002-10-28 04:45:29 +00:00
340bb96e64
Fairly major overhaul of MachineInstr & Operand classes
...
- Inline methods that are mostly a single line anyway
- Eliminate several methods that were never called
- Group methods a bit more consistently
llvm-svn: 4329
2002-10-28 04:24:49 +00:00
9668c8c8db
Add #includes now that MachineInstr.h doesn't include llvm/Target/MachineInstrInfo.h
...
llvm-svn: 4327
2002-10-28 02:28:39 +00:00
94a4f22573
Don't #include <Support/*>, #include "Support/*"
...
llvm-svn: 4325
2002-10-28 02:11:53 +00:00
2a3bd1c562
*** empty log message ***
...
llvm-svn: 4323
2002-10-28 02:01:37 +00:00
658839bafd
MachineFunction now includes MachineBasicBlock so there is no need to
...
reinclude it
llvm-svn: 4322
2002-10-28 02:01:35 +00:00
8710aab04c
Rename MachineCodeForBasicBlock to MachineBasicBlock
...
llvm-svn: 4318
2002-10-28 01:41:47 +00:00
6fc3ca062d
*** empty log message ***
...
llvm-svn: 4317
2002-10-28 01:41:27 +00:00
9baa9ad7c7
Inline some methods from .cpp files into .h files, minor cleanups
...
llvm-svn: 4313
2002-10-28 01:21:55 +00:00
8494d08688
Minor cleanups
...
llvm-svn: 4312
2002-10-28 01:16:38 +00:00
6d8a6c645c
Move machine code generation/destruction passes out of Sparc.cpp because
...
they are generic
llvm-svn: 4310
2002-10-28 01:12:41 +00:00
f9df48d34c
Prune #includes
...
llvm-svn: 4307
2002-10-28 01:02:51 +00:00
9f99867c6c
Updates to match misha's changes
...
llvm-svn: 4302
2002-10-28 00:37:53 +00:00
7ae7f84cf3
Changed `MachineCodeForMethod' to `MachineFunction'.
...
llvm-svn: 4301
2002-10-28 00:28:31 +00:00
9e33759f88
Initial checkin of codegen infrastructure for LLVM-JIT
...
llvm-svn: 4282
2002-10-25 22:54:41 +00:00
e97144120d
Tell PassManager that this pass does not invalidate the CFG so that dominator
...
information and Loop info will not have to be recomputed after this runs.
llvm-svn: 4269
2002-10-23 03:30:47 +00:00
5ae3bd630d
Ensure definate initialization
...
llvm-svn: 4263
2002-10-22 23:34:11 +00:00
ce64eddb71
- Two minor improvements to the MachineInstr class to reduce footprint and
...
overhead: Merge 3 parallel vectors into 1, change regsUsed hash_set to be a
bitvector. Sped up LLC a little less than 10% in a debug build!
llvm-svn: 4261
2002-10-22 23:16:21 +00:00
f5492b0c5b
Significant improvement: GEP used by a load or store no longer generates
...
a separate ADD; instead just use the indexed load/store instruction!
Also, a bug fix: folding a GEP with a leading non-zero index with
its predecessor was incorrect: now it only happens if the predecessor
is pointing to an indexable type (aka SequentialType).
llvm-svn: 4168
2002-10-14 16:30:55 +00:00
9e5eb46362
Use vectors instead of hash_maps for issueGaps and conflictLists.
...
These hash lookups were a major sink of time because they happen so often!
Also, add option to disable scheduling.
llvm-svn: 4138
2002-10-13 00:40:37 +00:00
f8c6e3db55
Major bug fix: was not adding CD edges for RETURNs!
...
llvm-svn: 4137
2002-10-13 00:39:22 +00:00
3e54d6c3be
Major bug fix: spill code for an instruction in a delay slot was
...
merrily being inserted before/after the instruction!
llvm-svn: 4116
2002-10-11 16:12:40 +00:00
ffc9dd5c0d
Don't pad variables in stack slots for performance!
...
llvm-svn: 4115
2002-10-11 16:10:53 +00:00
75b4a29613
Bug fix in folding getElementPtr instructions: don't fold one into
...
a predecessor if it has a non-zero first index and the predecessor
ends with a struct index.
llvm-svn: 3982
2002-09-29 22:55:05 +00:00
be55f2dd2c
Convert DIRS to PARALLEL_DIRS. They can be built independently.
...
llvm-svn: 3972
2002-09-29 11:52:14 +00:00
9011903ee2
Added a couple of helper methods for live range construction.
...
llvm-svn: 3970
2002-09-28 17:05:43 +00:00
ed2df3ecf8
Live ranges for Return value and return address of a Call are now
...
created here, simply by handling all implicit operands (which should
have been done anyway).
llvm-svn: 3969
2002-09-28 17:05:22 +00:00
8076fe87b7
Fixed method getReturnValue(): it should return NULL if the
...
callee does not return a value.
llvm-svn: 3968
2002-09-28 17:03:54 +00:00
8fef3b8033
Fixed incorrect assertion: spill code for function ptr should be
...
handled like normal operands, not like other call arguments.
llvm-svn: 3967
2002-09-28 17:02:40 +00:00
66303bb9a5
Sign-extend integer constants from original type size to 64 bits!
...
llvm-svn: 3958
2002-09-27 14:26:20 +00:00
5cc5d4b19a
Add method IGNode::getCombinedDegree to count the sum of the degrees
...
of two nodes, excluding duplicates.
llvm-svn: 3848
2002-09-20 00:55:04 +00:00
e6ee32bfe2
Add PostOpts/ and rename PreSelection/ to PreOpts/.
...
llvm-svn: 3847
2002-09-20 00:53:53 +00:00
97c348d9ec
Add method MachineInstr::replace to rewrite a machine instruction in place.
...
llvm-svn: 3843
2002-09-20 00:47:49 +00:00
e008b2d62e
Allow copy coalescing in more cases: if sum of node degrees is more than
...
than #available regs, compute the sum excluding duplicates and if that
is less than #regs, go ahead and coalesce.
Add method IGNode::getCombinedDegree to count excluding duplicates.
llvm-svn: 3842
2002-09-20 00:45:47 +00:00
5e1c434572
Peephole optimization pass on final machine code.
...
llvm-svn: 3840
2002-09-20 00:42:11 +00:00
a50098d8e4
Files moved to CodeGen/PreOpts.
...
llvm-svn: 3839
2002-09-20 00:30:46 +00:00
e9ac29b475
Moving these files from Code/PreSelection to here.
...
Original logs for PreSelection.cpp:
revision 1.2
date: 2002/09/17 23:50:32; author: lattner; state: Exp; lines: +1 -3
Don't put default parameter values into .cpp files, it breaks 3.x compilers
revision 1.1
date: 2002/09/16 15:31:13; author: vadve; state: Exp;
New preselection pass that specializes LLVM code for a target machine,
while remaining in legal portable LLVM form and preserving type
information and type safety.
llvm-svn: 3838
2002-09-20 00:29:28 +00:00
2d7730e3dd
Don't put default parameter values into .cpp files, it breaks 3.x compilers
...
llvm-svn: 3799
2002-09-17 23:50:32 +00:00
077b45d931
Add support for GCC 2.96
...
llvm-svn: 3777
2002-09-17 17:23:09 +00:00
5ce9e4bc64
Add subdirectory PreSelection.
...
llvm-svn: 3739
2002-09-16 15:32:07 +00:00
161a507def
New preselection pass that specializes LLVM code for a target machine,
...
while remaining in legal portable LLVM form and preserving type
information and type safety.
llvm-svn: 3738
2002-09-16 15:31:13 +00:00
751130215f
Dump routine now writes out allocated register numbers if available.
...
llvm-svn: 3737
2002-09-16 15:18:53 +00:00
e567179aaa
Improve and fix error in allocating stack slots: adjust alignment after adding
...
base address of the relevant region (instead of assuming that each region
is maximally aligned).
llvm-svn: 3736
2002-09-16 15:18:16 +00:00
03710d247d
Add a version of ChooseRegOrImmed to handle numerical constants
...
introduced by InstrSelection.
llvm-svn: 3735
2002-09-16 15:15:57 +00:00
4d66e9973f
Add an assertion.
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llvm-svn: 3734
2002-09-16 15:13:59 +00:00
580b851d23
Fix typos in previous checkin.
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llvm-svn: 3726
2002-09-15 15:33:48 +00:00
a73d6653f6
RegAllocCommon no longer includes CommandLine.h so we have to include it
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here.
llvm-svn: 3725
2002-09-15 07:07:55 +00:00
0e56b36b53
Break RA_DEBUG option into several levels to get better control over
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debug output.
llvm-svn: 3724
2002-09-14 23:05:33 +00:00
d171a8c7c5
Remove unnecessary include.
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llvm-svn: 3723
2002-09-14 23:04:52 +00:00
c9f1e71360
Break RA_DEBUG option into several levels to get better output.
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llvm-svn: 3722
2002-09-14 22:18:37 +00:00
a8f926c0c1
Moving to lib/CodeGen/RegAlloc.
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llvm-svn: 3718
2002-09-14 11:57:17 +00:00
5fb1fee605
Fix a bug I introduced into the code generator. :(
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llvm-svn: 3694
2002-09-12 20:27:10 +00:00
b9d9e0ff8d
- Change getelementptr instruction to use long indexes instead of uint
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indexes for sequential types.
llvm-svn: 3681
2002-09-11 01:21:29 +00:00
74946507fc
Make sure the leakdetector is told about temporary Phi nodes also, so it doesn't
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erroneously report them as leaks
llvm-svn: 3624
2002-09-08 21:19:29 +00:00
16d4c60600
Inform the memory leak detector that TmpInstruction objects should not be
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subject to memory leak checking.
llvm-svn: 3623
2002-09-08 21:08:43 +00:00
b0b412e66e
- Renamed Type::isIntegral() to Type::isInteger()
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- Added new method Type::isIntegral() that is the same as isInteger, but
also accepts bool.
llvm-svn: 3574
2002-09-03 01:08:28 +00:00
bcba516097
moved this file from lib/Reoptimizer/Mapping
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llvm-svn: 3519
2002-08-27 22:47:33 +00:00
2762328f9e
Makefile for new sub directory
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llvm-svn: 3518
2002-08-27 22:46:38 +00:00
fe9eda7fb1
Added Mapping subdir
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llvm-svn: 3517
2002-08-27 22:45:49 +00:00
872c7f9a9e
Use newly-added type inspection support in InstTreeNode subclasses.
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llvm-svn: 3501
2002-08-24 21:02:09 +00:00
8c1e3f7310
Moved code here to extract memory instruction indices and to check
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whether FoldGetElemNodes should be called. This is machine-independent
but was in the Sparc directory. This is in a new function: GetMemInstArgs.
llvm-svn: 3500
2002-08-24 21:00:08 +00:00
492a263ffd
Added #include <alloca.h>
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llvm-svn: 3491
2002-08-23 10:54:26 +00:00
dfb3a2cd07
Eliminated the MemAccessInst class, folding contents into GEP class.
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llvm-svn: 3487
2002-08-22 23:37:20 +00:00
3f76984952
dumpNode() does not need to print MachineInstrs.
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llvm-svn: 3444
2002-08-22 02:59:46 +00:00
3db97eb499
Unary Not (boolean and bitwise) is no longer a separate LLVM instruction
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but is instead implemented with XOR. Note that the InstrForest opLabels
for Not and BNot remain the same, i.e., the XOR is recognized and
represented as a (boolean or bitwise) Not when building the instruction
trees. But these tree nodes are now binary, not unary.
llvm-svn: 3343
2002-08-15 14:19:22 +00:00
fa99db77a8
Add method MachineInstr::substituteValue() which substitutes
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one Value with another one in all operands and implicit references
of the machine instruction.
llvm-svn: 3306
2002-08-14 16:52:58 +00:00
959a5fbf8e
* Removed extraneous #includes
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* Fixed file headers to be consistent with the rest of LLVM
* Other minor fixes
llvm-svn: 3278
2002-08-09 20:08:06 +00:00
02e7a86fec
* Removed extraneous #includes
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* Fixed file headers to be consistent with the rest of LLVM
* Other minor fixes
llvm-svn: 3277
2002-08-09 20:08:03 +00:00
3c3457ccea
We are using std::vector, so remove extraneous namespace prefixes
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llvm-svn: 3275
2002-08-09 20:05:34 +00:00
e08000ac9f
Very minor cleanups
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llvm-svn: 3271
2002-08-09 18:55:18 +00:00
f0ed55d1ee
- Cleaned up the interface to AnalysisUsage to take analysis class names
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instead of ::ID's.
- Pass::getAnalysis<> now no longer takes an optional argument
llvm-svn: 3265
2002-08-08 19:01:30 +00:00
40eb9dafed
- Cleaned up the interface to AnalysisUsage to take analysis class names
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instead of ::ID's.
- Pass::getAnalysis<> now no longer takes an optional argument
llvm-svn: 3264
2002-08-08 19:01:28 +00:00
1a1c3ed56d
Add function GetConstantValueAsUnsignedInt.
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Fix 2 bugs in FoldGetElemChain so index vector is not modified
when no GEPs are folded in, and so a hasLeadingZero is computed
only for the last folded GEP, not the one after that if any.
llvm-svn: 3244
2002-08-04 20:49:49 +00:00
4bc962d1d5
* Move InstructionSelection Pass here instead of living in Sparc.cpp. It
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is platform independant afterall.
* Object orientize the functions, cleanup code a bit. Instead of static
global functions, the helpers for instruction selection are now part of
the InstructionSelection Pass class.
llvm-svn: 3147
2002-07-30 03:57:36 +00:00
Alkis Evlogimenos