733aac1270
Disable 2->3 address promotion of add and inc instructions to LEA's. In
...
addition to being three address, LEA's don't set the flags.
This fixes 186.crafty.
llvm-svn: 19251
2005-01-02 04:18:17 +00:00
e7228736e0
Add a new method.
...
llvm-svn: 19249
2005-01-02 02:38:18 +00:00
b62b45b3fc
Add support for SETNPr to lower to memory form.
...
llvm-svn: 19248
2005-01-02 02:37:46 +00:00
b7782d77c1
Implement the convertToThreeAddress method, add support for inverting JP/JNP
...
branches.
llvm-svn: 19247
2005-01-02 02:37:07 +00:00
295e45e60e
Two changes here:
...
1. Add new instructions for checking parity flags: JP, JNP, SETP, SETNP.
2. Set the isCommutable and isPromotableTo3Address bits on several
instructions.
llvm-svn: 19246
2005-01-02 02:35:46 +00:00
182db0cac0
Add some bits that can be set for instructions.
...
llvm-svn: 19241
2005-01-02 02:27:48 +00:00
83df5d25b7
Fix a FIXME: Select instructions on longs were miscompiled.
...
While we're at it, improve codegen of select instructions. For this
testcase:
int %test(bool %C, int %A, int %B) {
%D = select bool %C, int %A, int %B
ret int %D
}
We used to generate this code:
_test:
cmpwi cr0, r3, 0
bne .LBB_test_2 ;
.LBB_test_1: ;
b .LBB_test_3 ;
.LBB_test_2: ;
or r5, r4, r4
.LBB_test_3: ;
or r3, r5, r5
blr
Now we emit:
_test:
cmpwi cr0, r3, 0
bne .LBB_test_2 ;
.LBB_test_1: ;
or r4, r5, r5
.LBB_test_2: ;
or r3, r4, r4
blr
-Chris
llvm-svn: 19214
2005-01-01 16:10:12 +00:00
78394258ae
Substantially improve the code generated by non-folded setcc instructions.
...
In particular, instead of compiling this:
bool %test(int %A, int %B) {
%C = setlt int %A, %B
ret bool %C
}
to this:
test:
save %sp, -96, %sp
subcc %i0, %i1, %g0
bl .LBBtest_1 !
nop
ba .LBBtest_2 !
nop
.LBBtest_1: !
or %g0, 1, %i0
ba .LBBtest_3 !
nop
.LBBtest_2: !
or %g0, 0, %i0
ba .LBBtest_3 !
nop
.LBBtest_3: !
restore %g0, %g0, %g0
retl
nop
We now compile it to this:
test:
save %sp, -96, %sp
subcc %i0, %i1, %g0
or %g0, 1, %i0
bl .LBBtest_2 !
nop
.LBBtest_1: !
or %g0, %g0, %i0
.LBBtest_2: !
restore %g0, %g0, %g0
retl
nop
llvm-svn: 19213
2005-01-01 16:06:57 +00:00
93feeb18f1
Fix PR490
...
Fix testcase CodeGen/CBackend/2004-12-28-LogicalConstantExprs.ll
llvm-svn: 19176
2004-12-29 04:00:09 +00:00
45382d34cc
Remove unused enum value
...
llvm-svn: 19024
2004-12-17 22:41:46 +00:00
227010bb31
Remove unused #include
...
llvm-svn: 19021
2004-12-17 19:07:04 +00:00
db0bf10e4a
Change the sentinal
...
llvm-svn: 19007
2004-12-17 00:46:51 +00:00
979b903916
Create a stack slot for the return address lazily instead of eagerly. This
...
save small amounts of time for functions that don't call llvm.returnaddress
or llvm.frameaddress (which is almost all functions).
llvm-svn: 19006
2004-12-17 00:07:46 +00:00
991b5e9457
Chris is a pain ;) Removing reassociate.
...
llvm-svn: 19005
2004-12-16 23:16:16 +00:00
a5528e89fd
Removing commented out lines.
...
llvm-svn: 19004
2004-12-16 23:13:16 +00:00
08e19bb412
Removed LICM and GCSE.
...
llvm-svn: 19003
2004-12-16 23:07:36 +00:00
5a4c66cfe9
Remove dead #include
...
llvm-svn: 18994
2004-12-16 19:32:38 +00:00
20d74fd986
Adjust to changes in asmwriter filenames
...
llvm-svn: 18987
2004-12-16 17:33:24 +00:00
a38954dd64
Specify all of the targets built.
...
llvm-svn: 18985
2004-12-16 17:26:44 +00:00
03227509c0
Use the rules in Makefile.rules to build SparcV9GenCodeEmitter.inc instead
...
of custom rules.
llvm-svn: 18984
2004-12-16 16:47:56 +00:00
0bc3333ff4
Fix header
...
llvm-svn: 18983
2004-12-16 16:47:03 +00:00
0782e27d85
Factor out common .td file chunks.
...
llvm-svn: 18982
2004-12-16 16:31:57 +00:00
298a7f8d8b
Fix PR485, instead of emitting zero sized arrays, emit arrays of size 1.
...
llvm-svn: 18974
2004-12-15 23:13:15 +00:00
4bc39bef79
The mystery of Olden/tsp solved, and more opportunities for speedup.
...
llvm-svn: 18932
2004-12-14 09:10:10 +00:00
36c14da84f
Get rid of shifts by zero in most cases.
...
llvm-svn: 18931
2004-12-14 08:21:02 +00:00
b3b1c279a2
When generating code for X86 targets, make sure the fp control word is set
...
to 64-bit precision, not 80 bits.
llvm-svn: 18915
2004-12-13 21:52:52 +00:00
951e94e867
Add some notes
...
llvm-svn: 18911
2004-12-13 20:13:10 +00:00
c97cac3d32
Set the rounding mode for the X86 FPU to 64-bits instead of 80-bits. We
...
don't support long double anyway, and this gives us FP results closer to
other targets.
This also speeds up 179.art from 41.4s to 18.32s, by eliminating a problem
with extra precision that causes an FP == comparison to fail (leading to
extra loop iterations).
llvm-svn: 18895
2004-12-13 17:23:11 +00:00
cf2c1866cb
Add V8 SPEC status.
...
llvm-svn: 18844
2004-12-13 00:27:35 +00:00
cbd47631ea
Fix Regression/CodeGen/PowerPC/2004-12-12-ZeroSizeCommon.ll, and all programs
...
when compiled with debug information.
llvm-svn: 18835
2004-12-12 20:36:19 +00:00
10b637eade
CSE calls to getTypeSize.
...
llvm-svn: 18833
2004-12-12 20:31:00 +00:00
17550c456c
Use the target triple to pick this target.
...
llvm-svn: 18830
2004-12-12 17:40:28 +00:00
23b2bc54b0
Complete the list of MultiSource failures.
...
llvm-svn: 18826
2004-12-12 08:22:11 +00:00
ed9346820d
hbd should be working now.
...
llvm-svn: 18824
2004-12-12 07:42:59 +00:00
27358a44d1
Finally enable the setcc-branch folding code.
...
Also, fix a bug where ubyte 255 would sometimes be output as -1. This
was afflicting hbd.
llvm-svn: 18823
2004-12-12 07:42:58 +00:00
e5351ad5f0
Add (currently disabled) code for canFoldSetCC
...
llvm-svn: 18820
2004-12-12 06:22:30 +00:00
aa40b7d080
Add stubs for setcc-branch folding support.
...
llvm-svn: 18818
2004-12-12 06:01:26 +00:00
25ac83565e
Print llvm code one function at a time.
...
llvm-svn: 18805
2004-12-11 22:17:07 +00:00
72daaa46eb
JIT should print LLVM each function before selecting instructions for it.
...
llvm-svn: 18803
2004-12-11 18:41:09 +00:00
b3095dd88f
Bools are *also* not ints. Sigh. Furthermore, most of the TargetMachine
...
ctor parameters can be defaulted.
Print the transformed llvm code input to the instruction selector
when -print-machineinstrs is on, just like V9.
llvm-svn: 18794
2004-12-11 05:19:04 +00:00
ba5e9f107c
Look for many more moves to fold (previously, we only
...
*or g0, x add g0, x recognized * as a move)
or x, g0 add x, g0
or 0, x add 0, x
or x, 0 add x, 0
llvm-svn: 18793
2004-12-11 05:19:03 +00:00
52a9ed63b5
Make GEPs not suck so much:
...
* Don't emit the Index * ElementSize multiply if Index is a constant.
* Use a shift, not a multiply, if ElementSize is 1/2/4/8.
* If ElementSize fits in the immediate field of SMUL, then put it there.
Fix a bug where struct offsets might be truncated (ConstantSInt::get is
now used instead of ConstantInt::get).
llvm-svn: 18792
2004-12-11 05:19:02 +00:00
cba3135ba8
Update lists of failing benchmarks, including info on which
...
ones are failing in cbe.
llvm-svn: 18791
2004-12-11 05:19:01 +00:00
2e2f3e26ba
Move -lowerselect later in the chain; some select instructions were
...
slipping through into the instruction selector, which can't deal with
them yet.
llvm-svn: 18758
2004-12-10 08:39:30 +00:00
2ccff7c256
Add the rest of the multiply instructions.
...
llvm-svn: 18757
2004-12-10 08:39:29 +00:00
4bfd3f7c98
Support binary operations with immediates for <= cInt.
...
llvm-svn: 18756
2004-12-10 08:39:28 +00:00
428037be05
Update lists of failing benchmarks (except C++...something is the
...
matter with my sparcv8 libstdc++.a) and to-do list.
llvm-svn: 18755
2004-12-10 08:39:27 +00:00
81c7fd2fce
Emit correct prototype for __builtin_alloca on V8.
...
llvm-svn: 18745
2004-12-10 05:44:45 +00:00
836727ea84
Add SparcV8 target back into the build
...
llvm-svn: 18738
2004-12-10 04:54:21 +00:00
1d0fe16906
Adjust paths: Sparc/V8 --> SparcV8
...
llvm-svn: 18737
2004-12-10 04:48:57 +00:00
a14476c9bf
Make this file self-contained.
...
llvm-svn: 18736
2004-12-10 04:46:30 +00:00
cb3b98586d
Update list of failing MultiSource benchmarks. It works out to +5 -5, but I
...
think some of these might be the CFE's fault; a rebuild should come soon.
llvm-svn: 18735
2004-12-10 04:42:46 +00:00
5183f22a64
When FpMOVDs appeared in pairs, we were mistakenly skipping over the latter of
...
each pair. I think this fixes that.
One of these days, I swear I'm going to get the hang of C++ iterators.
Really.
llvm-svn: 18734
2004-12-10 04:42:45 +00:00
34f7c3d37a
We're continuing to make progress on MultiSource.
...
llvm-svn: 18714
2004-12-09 18:54:31 +00:00
847c05deef
Bytes and shorts are aligned differently from words.
...
llvm-svn: 18713
2004-12-09 18:51:02 +00:00
bac69b7df9
Fix asm-printing directives (how did we not see this before...apparently,
...
everything was an int!)
llvm-svn: 18712
2004-12-09 18:51:01 +00:00
f878f75d46
Move lower intrinsics before FP constant emission, in case
...
intrinsic lowering ever introduces constants.
Rename local symbols before printing function bodies, fixing 255.vortex
with the CBE!!!
llvm-svn: 18534
2004-12-05 06:49:44 +00:00
26d9c22832
Fix test/Regression/CodeGen/CBackend/2004-12-03-ExternStatics.ll and
...
PR472
llvm-svn: 18459
2004-12-03 17:19:10 +00:00
608a6dae43
This code rotted - change it to call abort() until someone wants
...
to rewrite this to use relocations.
llvm-svn: 18453
2004-12-03 06:57:14 +00:00
c0d9dcdfac
When writing kernel, save the branches til the end. They are still put in the "right place" in the schedule, but sometimes when folding to make a kernel instructions are added between branches. This is wrong. To avoid this, we handle branches special.
...
llvm-svn: 18450
2004-12-03 05:25:22 +00:00
9d76c236f7
Fix a regression caused by the previous patch
...
llvm-svn: 18449
2004-12-03 05:13:15 +00:00
7651614c4d
The stripping pass as we know it is about to disappear
...
llvm-svn: 18436
2004-12-02 21:05:01 +00:00
335c342440
Reverting revision 1.209.
...
Including alloca.h on Solaris brings in the prototype of strftime(), which
breaks compilation of CBE generated code.
llvm-svn: 18435
2004-12-02 19:02:49 +00:00
33660426a5
Spill/restore X86 floating point stack registers with 64-bits of precision
...
instead of 80-bits of precision. This fixes PR467.
This change speeds up fldry on X86 with LLC from 7.32s on apoc to 4.68s.
llvm-svn: 18433
2004-12-02 18:17:31 +00:00
96b14e18bb
Consider 64-bit registers to be FP as well.
...
llvm-svn: 18432
2004-12-02 17:57:21 +00:00
201e972dc4
Reworked branch adding in prologue. Added check for infinite loops which are not modulo scheduled.
...
llvm-svn: 18419
2004-12-02 07:22:15 +00:00
e94b466a8e
Reverting this patch:
...
http://mail.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20041122/021428.html
It broke Mutlisource/Applications/obsequi
llvm-svn: 18407
2004-12-01 18:27:03 +00:00
e58bf09138
Initial support for packed types, contributed by Morten Ofstad
...
llvm-svn: 18406
2004-12-01 17:14:28 +00:00
798e0349c0
Do not let GCC emit a warning for INT64_MIN
...
llvm-svn: 18398
2004-11-30 21:33:58 +00:00
86deaf2211
Sparcs behave better if we use <alloca.h> and avoid messing with __builtin_alloca.
...
llvm-svn: 18397
2004-11-30 21:27:01 +00:00
5c9fa5bcee
Update list of failing benchmarks.
...
llvm-svn: 18384
2004-11-30 08:15:44 +00:00
1d6b926ab6
If we're about to emit something like:
...
%f0 = fmovs %f0
%f1 = fmovs %f1
then just delete the FpMOVD pseudo-instruction instead. Also, add
statistics and debug printouts.
llvm-svn: 18383
2004-11-30 08:15:15 +00:00
bd11625469
Fix several bugs in 'op x, imm' handling. Foremost is that we now emit
...
addi r3, r3, -1
instead of
addi r3, r3, 1
for 'sub int X, 1'.
Secondarily, this fixes several cases where we could crash given an unsigned
constant. And fixes a couple of minor missed optimization cases, such as
xor X, ~0U -> not X
llvm-svn: 18379
2004-11-30 07:30:20 +00:00
7562a05735
Fix CodeGen/PowerPC/2004-11-30-shr-var-crash.ll
...
llvm-svn: 18376
2004-11-30 06:40:04 +00:00
ce350cbd3a
Fix test/Regression/CodeGen/PowerPC/2004-11-29-ShrCrash.ll
...
llvm-svn: 18374
2004-11-30 06:36:11 +00:00
9eeb2033ff
Fix test/Regression/CodeGen/PowerPC/2004-11-30-shift-crash.ll
...
llvm-svn: 18371
2004-11-30 06:29:10 +00:00
e0c207d2d3
Remove extraneous namespacification. In particular, don't define llvm::llvm::createInternalGlobalMapperPass
...
llvm-svn: 18365
2004-11-30 00:22:59 +00:00
f9c5dc9fb4
Revamp long/ulong comparisons to use a much more efficient sequence (thanks
...
to Brian and the Sun compiler for pointing out that the obvious works :)
This also enables folding all long comparisons into setcc and branch
instructions: before we could only do == and !=
For example, for:
void test(unsigned long long A, unsigned long long B) {
if (A < B) foo();
}
We now generate:
test:
subl $4, %esp
movl %esi, (%esp)
movl 8(%esp), %eax
movl 12(%esp), %ecx
movl 16(%esp), %edx
movl 20(%esp), %esi
subl %edx, %eax
sbbl %esi, %ecx
jae .LBBtest_2 # UnifiedReturnBlock
.LBBtest_1: # then
call foo
movl (%esp), %esi
addl $4, %esp
ret
.LBBtest_2: # UnifiedReturnBlock
movl (%esp), %esi
addl $4, %esp
ret
Instead of:
test:
subl $12, %esp
movl %esi, 8(%esp)
movl %ebx, 4(%esp)
movl 16(%esp), %eax
movl 20(%esp), %ecx
movl 24(%esp), %edx
movl 28(%esp), %esi
cmpl %edx, %eax
setb %al
cmpl %esi, %ecx
setb %bl
cmove %ax, %bx
testb %bl, %bl
je .LBBtest_2 # UnifiedReturnBlock
.LBBtest_1: # then
call foo
movl 4(%esp), %ebx
movl 8(%esp), %esi
addl $12, %esp
ret
.LBBtest_2: # UnifiedReturnBlock
movl 4(%esp), %ebx
movl 8(%esp), %esi
addl $12, %esp
ret
llvm-svn: 18330
2004-11-29 05:55:24 +00:00
d8cc4facd0
Reworked branching so we don't handle BAs specially. It just updates the branchTO regardless of what type of branch it is.
...
llvm-svn: 18322
2004-11-29 04:39:47 +00:00
341828ee64
Fixed bug where instructions in the kernel were not ordered right to preserve dependencies in a cycle.
...
llvm-svn: 18314
2004-11-28 23:36:15 +00:00
c0f8a1c721
The LLVM bool type shall have 1 byte alignment on PPC.
...
llvm-svn: 18311
2004-11-28 21:16:45 +00:00
43123c9f7a
Remove the ISel->AsmPrinter link via the TargetMachine that was put in
...
place to help bring up the PowerPC back end on Darwin. This code is no
longer serves any purpose now that the AsmPrinter does the right thing
all the time printing GlobalValues. --Cruft.
llvm-svn: 18267
2004-11-27 04:45:11 +00:00
b50fd9262d
There is no reason to store <x,x>, just store <x>.
...
llvm-svn: 18263
2004-11-26 20:25:17 +00:00
3f76eb69f6
Enable optimization suggested by Chris Lattner to not emit reloc stubs for
...
static global variables whose addresses are taken. This allows us to
convert the following code for taking the address of a static function foo
addis r2, r30, ha16(Ll1__2E_foo_2$non_lazy_ptr-"L00001$pb")
lwz r3, lo16(Ll1__2E_foo_2$non_lazy_ptr-"L00001$pb")(r2)
which also includes linker stub code emitted at the end of the .s file not
shown here, and replace it with this:
addis r2, r30, ha16(l1__2E_foo_2-"L00001$pb")
la r3, lo16(l1__2E_foo_2-"L00001$pb")(r2)
which in addition to not needing linker help, also has no load instruction.
For those not up on PowerPC mnemonics, la is shorthand for add immediate.
llvm-svn: 18239
2004-11-25 07:09:01 +00:00
8cbad8efcf
Fix the build on non ppc machines
...
llvm-svn: 18235
2004-11-25 06:14:45 +00:00
497a622376
The JIT works enough
...
llvm-svn: 18228
2004-11-25 04:14:54 +00:00
da76c16ba4
Fix encoding of fsel, fixing olden/power, McCat/bisort and several others.
...
All of Olden passes now! :)
llvm-svn: 18227
2004-11-25 04:11:07 +00:00
305f78f646
Fix encoding of fneg instruction
...
llvm-svn: 18226
2004-11-25 03:53:44 +00:00
191e525bae
Fix encoding of swari, fixing several programs, including Olden/mst
...
llvm-svn: 18225
2004-11-25 03:40:20 +00:00
5d8ae54267
There is not a 1-1 mappign between llvm blocks and PPC blocks, do not use
...
LLVM blocks as the keys for the branch rewriter. This fixes treeadd and
many other programs with the JIT.
llvm-svn: 18223
2004-11-25 00:33:57 +00:00
dd516799d7
* Rename existing relocations to be more specific
...
* Add relocations for refernces to non-lazy darwin stubs and implement
them correctly.
With this change, we can correctly references external globals, and now
all but two UnitTests and all but 1 Regression/C tests pass.
More importantly, bugpoint-jit will start giving us useful testcases,
instead of always telling us that references to external globals don't
work :)
llvm-svn: 18222
2004-11-24 22:30:08 +00:00
e49936af54
Add the same optimization that we do loading from fixed alloca slots to
...
storing to fixed alloca slots.
llvm-svn: 18221
2004-11-24 21:53:14 +00:00
078b6f2b62
Write CompilationCallback as an explicit assembly stub to avoid getting GCC's
...
prolog.
llvm-svn: 18220
2004-11-24 21:01:46 +00:00
659d72e319
When rewriting the original call instruction, make sure to rewrite it to
...
call the right address.
llvm-svn: 18213
2004-11-24 18:00:02 +00:00
cb9af557e7
Force the intregs ptr into R2 and the FPregs ptr into R3. This fixes a really
...
obscure problem where we were doing:
lmw r3,0(r9)
which is undefined on PPC. Now we do:
lmw r3,0(r2)
by force, not relying on the GCC register allocator for luck :)
llvm-svn: 18212
2004-11-24 17:42:55 +00:00
7217642438
Update list of failing benchmarks.
...
llvm-svn: 18202
2004-11-24 04:07:42 +00:00
1139802b98
Fix bug in emitGEPOperation with large struct-member offsets.
...
llvm-svn: 18201
2004-11-24 04:07:33 +00:00
130888ad37
Fix a few more tests by encoding the extsb and other XForm11 instructions
...
correctly.
llvm-svn: 18200
2004-11-24 03:52:02 +00:00
022e271db5
Fix the encoding of ORi and other DForm4 instructions. This brings us to
...
36/42 SingleSource/UnitTests passing!
llvm-svn: 18199
2004-11-24 02:15:41 +00:00
57542fcfc2
Loads are relocatable too
...
llvm-svn: 18198
2004-11-24 02:03:44 +00:00
7b1cf0d6c6
Calls do not need a MovPCtoLR instruction
...
llvm-svn: 18197
2004-11-24 02:00:06 +00:00
6a7ebe034e
Get constant pools working. This fixes even more programs, allowing us to
...
pass 24/42 in UnitTests (up from 20).
llvm-svn: 18196
2004-11-24 01:56:12 +00:00
13c71ca7b6
Forced branches to be first to be scheduled.
...
llvm-svn: 18195
2004-11-24 01:49:10 +00:00
193b6f3281
Rewrite branches more closely to correct. This makes more stuff pass, and
...
stops the infinite loops!
llvm-svn: 18194
2004-11-24 01:35:12 +00:00
b55f748b1a
Branch instructions explicitly represent CRx in them. bEcause of this, encode
...
them explicitly as well.
llvm-svn: 18193
2004-11-24 01:15:19 +00:00
674fe0bb60
Fix encoding of bctrl, and remove some unused instructions
...
llvm-svn: 18192
2004-11-24 00:16:37 +00:00
c7eeae4661
Fix encoding of blr and bctr
...
llvm-svn: 18178
2004-11-23 22:06:24 +00:00
c5fc6f5717
Use the correct register class as a constaint to gcc's inline assembly, so
...
that we don't end up trying to use r0 as a base register.
llvm-svn: 18176
2004-11-23 21:37:22 +00:00
617760687a
Save/Restore arg regs and nonvolatile regs the compiler might use during
...
CompilationCallback
llvm-svn: 18175
2004-11-23 21:34:18 +00:00
578dfd5e42
Fix the encoding of OR, AND and many other instructions
...
llvm-svn: 18174
2004-11-23 21:17:35 +00:00
94c58dc877
Support shr long/ulong.
...
llvm-svn: 18173
2004-11-23 21:10:50 +00:00
8d4a5ad55c
Support printing ConstantAggregateZeros.
...
llvm-svn: 18172
2004-11-23 21:10:49 +00:00
2e7f71863f
Update failing SingleSource test-case list.
...
llvm-svn: 18171
2004-11-23 21:10:48 +00:00
a630adebc7
Remove argtype and argcount magic, which was used by the old asmprinter.
...
llvm-svn: 18170
2004-11-23 20:41:34 +00:00
be39b8f541
Get rid of flags that are dead
...
llvm-svn: 18169
2004-11-23 20:37:41 +00:00
5f4b0e1bf7
Fix encoding of rlwinm?
...
llvm-svn: 18165
2004-11-23 19:23:32 +00:00
1238cca6df
Fix encodings
...
llvm-svn: 18164
2004-11-23 19:23:18 +00:00
431e0132ef
Enumerate CR registers
...
llvm-svn: 18162
2004-11-23 18:59:59 +00:00
a8936af13e
Initial implementation of exiting CompilationCallback
...
This should save all argument registers on entry and restore on exit, despite
that, simple things seem to work!!!
llvm-svn: 18161
2004-11-23 18:49:46 +00:00
febc3eb8fa
This method is dead
...
llvm-svn: 18160
2004-11-23 18:47:55 +00:00
24ad93f55c
Remove this method.
...
llvm-svn: 18159
2004-11-23 18:47:42 +00:00
cccd49f1b7
Squelch a bogus warning
...
llvm-svn: 18157
2004-11-23 15:57:01 +00:00
b1fd07a862
Squelch a bogus warning.
...
llvm-svn: 18156
2004-11-23 15:56:38 +00:00
7e7a08dba5
Don't return value from void function. This is only temporary anyway while
...
the JIT is made to work!
llvm-svn: 18155
2004-11-23 10:04:49 +00:00
bde370eb58
pseudocode for 64-bit lshr.
...
llvm-svn: 18154
2004-11-23 08:14:09 +00:00
40ff89c212
Fix a minor bug
...
llvm-svn: 18153
2004-11-23 06:56:31 +00:00
5369ab3e24
Be really paranoid about not breaking stuff yet
...
llvm-svn: 18152
2004-11-23 06:56:18 +00:00
4ff117585d
Implement the first hunk of CompilationCallback. The pieces missing are the
...
ones noted, which require funny PPC specific inline assembly.
If some angel felt the desire to help me, I think this is that last bit missing
for JIT support (however, generic code emitter might night work right with
the constant pool yet).
llvm-svn: 18151
2004-11-23 06:55:05 +00:00
d3311665cc
Add more known-failing tests.
...
llvm-svn: 18149
2004-11-23 06:39:50 +00:00
2491727b5d
Add the rest of the logical instructions.
...
llvm-svn: 18148
2004-11-23 06:39:37 +00:00
7445c5eadc
Implement the stub needed to get into compilation callback.
...
llvm-svn: 18147
2004-11-23 06:27:02 +00:00
e1187d46a1
Simplify code a bit
...
llvm-svn: 18146
2004-11-23 06:05:44 +00:00
8296c4c323
Initial implementation of the JIT interfaces. Relocation is done and stubs
...
for external functions work. CompilationCallback has not been written, and
stubs for internal functions are not generated yet. This means you can call
printf and exit, and use global variables, but cannot call functions local to
a module yet.
llvm-svn: 18145
2004-11-23 06:02:06 +00:00
743a43424f
Emit relocations for the global variable using instructions. This gets us
...
LA, LOADHiAddr, CALLpcrel, and MovePCtoLR working, though the constant pool
probably is not right.
llvm-svn: 18144
2004-11-23 05:59:53 +00:00
1c95751676
Implement all of the methods
...
llvm-svn: 18142
2004-11-23 05:57:57 +00:00
0b4eb3f806
Initial checkin of the 32-bit PPC relocation types
...
llvm-svn: 18141
2004-11-23 05:57:38 +00:00
f5363dc789
Move JITInfo from PPCTM to PPC32TM
...
llvm-svn: 18140
2004-11-23 05:56:40 +00:00
ae670d5895
Do not provide the non-specialized PowerPCJITInfo object, it is pretty useless.
...
Instead, let derived classes provide specialized ones.
llvm-svn: 18139
2004-11-23 05:55:38 +00:00
6500c6d332
LA is really addi. Be consistent with operand ordering to avoid confusing the code emitter
...
llvm-svn: 18138
2004-11-23 05:54:25 +00:00
c3a7394291
Changed the CreateCodeToLoadConst function to preserve SSA form. This basically means adding extra tmp instructions for intermediate values.
...
llvm-svn: 18137
2004-11-23 04:22:29 +00:00
69e4cc55ef
Remove some dead code
...
llvm-svn: 18136
2004-11-22 23:07:22 +00:00
40565d72d4
Comment out a couple of unused instructions.
...
llvm-svn: 18135
2004-11-22 23:07:01 +00:00
a76f09d0d3
Do not push two return addresses on the stack when we call external functions who have their addresses taken. This fixes test-call.ll
...
llvm-svn: 18134
2004-11-22 22:25:30 +00:00
0e7faedde7
Disable this.
...
llvm-svn: 18130
2004-11-22 21:51:40 +00:00
8e9ed2747c
This chunk of code needs to be rewritten
...
llvm-svn: 18127
2004-11-22 21:45:54 +00:00
54e1b22ea3
Remove some dead vars and some useless namespacification
...
llvm-svn: 18126
2004-11-22 21:42:40 +00:00
80ad8871e7
Implement a disgusting hack to work around broken machine code emission of
...
the RDCCR instruction. This fixes a bunch of programs with the JIT.
llvm-svn: 18124
2004-11-22 21:25:10 +00:00
ab9cf27cd0
Fixed a bug where I was trying to ModuloSchedule a loop with no instructions but a terminator.
...
Fixed a bug in the schedule generation that was always using the start cycle.
llvm-svn: 18123
2004-11-22 20:41:24 +00:00
c15c120342
Remove JIT-specific code from the code emitter.
...
llvm-svn: 18122
2004-11-22 20:25:10 +00:00
8edcdaa6eb
New methods implemented
...
llvm-svn: 18121
2004-11-22 20:24:42 +00:00
b098ce7c8e
Implement the Sparc JIT interfaces, including relocation support.
...
llvm-svn: 18120
2004-11-22 20:24:27 +00:00
dd10ba214e
Add stub method for long shift codegen.
...
llvm-svn: 18100
2004-11-22 08:02:06 +00:00
d1502c5c5d
Update to-do list.
...
llvm-svn: 18099
2004-11-22 08:02:05 +00:00
96304f816f
Initial checkin of the V9 relocation types
...
llvm-svn: 18095
2004-11-22 00:40:51 +00:00
29a4b354a3
Implement setcc on longs.
...
llvm-svn: 18088
2004-11-21 08:11:28 +00:00
8ab27507fd
Add all the rest of the ADD and SUB variants, some of which are important for
...
64-bit support.
llvm-svn: 18087
2004-11-21 07:13:17 +00:00
46cdc9e043
Support add, sub, mul, div, rem on longs/ulongs (latter 3 by emitting libcalls).
...
Add a big comment containing my notes on how to do setcc for longs/ulongs.
llvm-svn: 18086
2004-11-21 07:13:16 +00:00
07ef7e0ae1
Update to-do list.
...
llvm-svn: 18085
2004-11-21 07:13:15 +00:00
6c9375b20c
Fix Shootout-C++/wc, which was broken by my recent changes to emit fewer
...
reg-reg copies. The necessary conditions for this bug are a GEP that is
used outside the basic block in which it is defined, whose components
other than the pointer are all constant zero, and where the use is
selected before the definition (backwards branch to successsor block).
llvm-svn: 18084
2004-11-21 05:14:06 +00:00
d68ebaacc0
There is no reason to emit function stubs for direct calls.
...
llvm-svn: 18082
2004-11-21 03:46:06 +00:00
016bd3ba11
Fix extraStack calculation -- I think in fact it might be getting a bit *too*
...
much stack, but that's better than not enough, which leads to miscompilations.
Fix FP vaarg.
llvm-svn: 18079
2004-11-21 03:35:22 +00:00
83189cdff3
Update list of failing benchmarks & to-do list.
...
llvm-svn: 18078
2004-11-21 03:35:21 +00:00
894bf8eed0
ignore generated files
...
llvm-svn: 18073
2004-11-21 00:01:54 +00:00
aee9a76f52
ignore generated files.
...
llvm-svn: 18072
2004-11-21 00:00:54 +00:00
d02c9eb697
Remove all JIT specific code and switch the code generator over to emitting
...
relocations for global references.
llvm-svn: 18068
2004-11-20 23:55:15 +00:00
b7e72cba22
Implement the X86 JIT interfaces
...
llvm-svn: 18067
2004-11-20 23:54:33 +00:00
8f2ed923ea
Describe the X86 target-specific relocations.
...
llvm-svn: 18066
2004-11-20 23:54:19 +00:00
8c645ec0d3
We implement these interfaces
...
llvm-svn: 18065
2004-11-20 23:53:56 +00:00
5f3d274f5f
Adjust to changed interfaces
...
llvm-svn: 18064
2004-11-20 23:53:26 +00:00
a8ea7d9cdb
Support most cases of vaarg (except double).
...
llvm-svn: 18055
2004-11-20 22:50:42 +00:00
a45e7c40d4
Update failing test cases & to-do list.
...
llvm-svn: 18054
2004-11-20 22:50:41 +00:00
233e9bb546
This method was never implemented
...
llvm-svn: 18039
2004-11-20 04:19:47 +00:00
6f01b4cf1f
Remove this method, it's not clear how it could be implemented indep of 32 or 64-bit mode
...
llvm-svn: 18038
2004-11-20 04:17:17 +00:00
ae5ac03c1d
getJITStubForFunction is optional and unimplemented, just remove it for now.
...
llvm-svn: 18037
2004-11-20 04:15:38 +00:00
f0c6aff268
getJITStubForFunction is optional and unimplemented, just remove it.
...
llvm-svn: 18036
2004-11-20 04:14:44 +00:00
774e978e0d
Implement vacopy and vanext.
...
llvm-svn: 18031
2004-11-20 03:32:12 +00:00
4bf11e1618
Revert the patch that adds Function* for each 64-bit libc div/mul/rem that we
...
want to do; instead, we can use MachineInstr::addExternalSymbol(char*, bool) and
thus we don't have to modify the Module as we are code generating for it
llvm-svn: 18025
2004-11-20 00:10:20 +00:00
2e4f222045
Made modsched hidden and changed so it matches the style of other options.
...
llvm-svn: 18024
2004-11-19 23:34:33 +00:00
f1ccebba3d
Fix grammar
...
llvm-svn: 18023
2004-11-19 23:09:40 +00:00
ce75b2c2cf
Add protoypes for 64-bit long/ulong div, mul, and rem functions
...
llvm-svn: 18019
2004-11-19 22:14:35 +00:00
dbe04afcb9
Fix file comment header
...
llvm-svn: 18018
2004-11-19 22:09:21 +00:00
cb178bd478
Handle GhostLinkage case for completeness (should not be seen by the asm writer)
...
llvm-svn: 18015
2004-11-19 21:49:19 +00:00
1db83f7b73
Add VANext and VAArg stubs.
...
llvm-svn: 18012
2004-11-19 21:08:18 +00:00
1c014df436
Implement va_start.
...
llvm-svn: 18011
2004-11-19 20:57:24 +00:00
4cd9def8b7
Dont' forget to switch back to decimal output
...
llvm-svn: 18010
2004-11-19 20:57:07 +00:00
3db46bd0e1
First part of varargs support: getting all varargs which could possibly
...
be in registers into memory.
llvm-svn: 18006
2004-11-19 20:31:08 +00:00
8bb29bf3f6
va_end can safely be codegen'd to nothing on v8.
...
llvm-svn: 18004
2004-11-19 19:21:34 +00:00
201535d102
A very sorry stub implementation of varargs intrinsics...
...
llvm-svn: 18003
2004-11-19 18:53:59 +00:00
1810073046
Update list of expected test failures.
...
llvm-svn: 18002
2004-11-19 18:48:29 +00:00
3effd0d769
Fix bug in casting to long/ulong.
...
llvm-svn: 18001
2004-11-19 18:48:10 +00:00
488f4a4352
Eliminate another 6k register copies that the register allocator would just
...
coalesce out of hbd. Speeds up compilation by 2% (0.6s)
llvm-svn: 17987
2004-11-19 08:01:16 +00:00
f4fd759f9e
Generate fewer reg-reg copies for the register allocator to deal with.
...
This eliminates over 2000 in hbd alone.
llvm-svn: 17973
2004-11-19 02:06:40 +00:00
cb0da4f1b7
Fixed to fit in 80 columns.
...
llvm-svn: 17961
2004-11-18 18:47:29 +00:00
21590db8fd
Adding option to llc for ModuloScheduling. By default it is turned off.
...
llvm-svn: 17959
2004-11-18 18:38:01 +00:00
de6e536849
Rewrite LoadArgumentsToVirtualRegs, making it match almost exactly how
...
visitCallInst works. Support cast of byte/short/int to long.
llvm-svn: 17949
2004-11-18 07:43:33 +00:00
2c6b9c914b
Update current expected failures list - expand it to include all of
...
SingleSource. Update to-do list (open-coding refers to binary operations on
longs, not to passing them into functions, which we already support.)
llvm-svn: 17948
2004-11-18 07:43:32 +00:00
2b575bec80
Eliminate another common source of moves that the register allocator
...
shouldn't be forced to coalesce for us: folded GEP operations. This too
fires thousands of times across the testsuite.
llvm-svn: 17947
2004-11-18 07:22:46 +00:00
5d9c292e7f
When accessing the base register for global variables, use the register
...
directly rather than making a copy for the register allocator to coalesce.
This kills thousands of live intervals across the testsuite.
llvm-svn: 17946
2004-11-18 06:51:29 +00:00
51f6635e42
Clean up and fix cast codegen by removing cases that are handled elsewhere,
...
and properly emitting signed short to unsigned int. This fixes the last
regression vs. the CBE, MultiSource/Applications/hbd.
llvm-svn: 17942
2004-11-18 04:56:53 +00:00
1553b58f39
Allocate fewer registers and tighten up alignment restrictions.
...
llvm-svn: 17929
2004-11-18 00:25:20 +00:00
2a3e8a7268
Update to-do list.
...
llvm-svn: 17927
2004-11-17 22:33:55 +00:00
3b10744e0f
Update list of failing SingleSource Benchmarks
...
llvm-svn: 17926
2004-11-17 22:33:28 +00:00
f1233fb84f
We were (somehow) getting the wrong branch opcode for setcc float instrs.
...
llvm-svn: 17925
2004-11-17 22:06:56 +00:00
7beb51cd29
Added my own defMap. Only saving values that are not loop invariant. Fixed a couple of assertions that were triggered due to registers not being allocated. These both had to do with PHINodes.
...
llvm-svn: 17907
2004-11-16 21:31:37 +00:00
2004d90f97
Fix a major bug in the signed shr code, which apparently only breaks 134.perl!
...
llvm-svn: 17902
2004-11-16 18:40:52 +00:00
b21ea3cb41
Update list of failing benchmarks
...
llvm-svn: 17895
2004-11-16 07:32:58 +00:00
97f8adffff
Correct the implicit-defs information for indirect and direct calls.
...
You can't have implicit defs that overlap explicit defs, or implicit
defs that alias one another.
llvm-svn: 17894
2004-11-16 07:32:09 +00:00
f242979cd0
Simplify namespaces
...
llvm-svn: 17870
2004-11-16 04:47:33 +00:00
6b7652fae5
Remove a dead function, which died when we got GAS emission working (phwew,
...
hold your nose!)
llvm-svn: 17869
2004-11-16 04:34:29 +00:00
c927072b50
Implement a simple FIXME: if we are emitting a basic block address that has
...
already been emitted, we don't have to remember it and deal with it later,
just emit it directly.
llvm-svn: 17868
2004-11-16 04:30:51 +00:00
2e182fc39b
* Merge some win32 ifdefs together
...
* Get rid of "emitMaybePCRelativeValue", either we want to emit a PC relative
value or not: drop the maybe BS. As it turns out, the only places where
the bool was a variable coming in, the bool was a dynamic constant.
llvm-svn: 17867
2004-11-16 04:21:18 +00:00
9cc2dac7c1
Add debug-only=jit printout, so we see when lazily resolved symbols are
...
set up.
llvm-svn: 17862
2004-11-15 23:16:55 +00:00
34b754d99b
Simplify and rearrange long shift code
...
llvm-svn: 17861
2004-11-15 23:16:34 +00:00
a8c99d4daf
Add BCTR and LWZU instruction opcodes
...
llvm-svn: 17851
2004-11-15 21:20:09 +00:00
55157f0865
Update list of failing Benchmarks.
...
llvm-svn: 17823
2004-11-15 05:57:26 +00:00
9dcb2fe161
Expand Defs to encompass all the possibly-call-clobbered regs.
...
llvm-svn: 17822
2004-11-15 05:56:53 +00:00
7f245d47c5
GhostLinkage should not reach asm printing stage
...
llvm-svn: 17750
2004-11-14 21:03:49 +00:00
e225fa12ab
Handle GhostLinkage (should not ever reach the assembly printing stage!)
...
llvm-svn: 17749
2004-11-14 21:03:30 +00:00
8b8ba9fcf7
Fix build on Linux/PowerPC64 using SuSE GCC (#undef PPC)
...
llvm-svn: 17744
2004-11-14 20:34:01 +00:00
e13c960415
Fix problem with insertion point for ADJCALLSTACKDOWN.
...
llvm-svn: 17733
2004-11-14 06:32:08 +00:00
a281ebc490
Update lists of failing unit tests.
...
Exclude bigfib, so that we effectively exclude all C++ benchmarks.
Update to-do list: mention va_start.
llvm-svn: 17732
2004-11-14 06:32:07 +00:00
347a000be6
Fix NotTest - round up extraStack to the nearest doubleword, if it is
...
not zero.
llvm-svn: 17728
2004-11-14 05:19:00 +00:00
e90176e171
Update failing Benchmarks; point out that I'm skipping Shootout-C++.
...
llvm-svn: 17725
2004-11-14 04:43:12 +00:00
18b6015b11
Update expected UnitTests failures.
...
llvm-svn: 17723
2004-11-14 03:22:08 +00:00
e6b47514a3
Rewrite outgoing arg handling to handle more weird corner cases.
...
llvm-svn: 17722
2004-11-14 03:22:07 +00:00
07097e12d5
Support UndefValue emission.
...
llvm-svn: 17721
2004-11-14 03:22:05 +00:00
56c4c99cca
Don't print unneeded labels
...
llvm-svn: 17714
2004-11-13 23:27:11 +00:00
073f6ca344
Hack around stupidity in GCC, fixing Burg with the CBE and
...
CBackend/2004-11-13-FunctionPointerCast.llx
llvm-svn: 17710
2004-11-13 22:21:56 +00:00
049d33a717
shld is a very high latency operation. Instead of emitting it for shifts of
...
two or three, open code the equivalent operation which is faster on athlon
and P4 (by a substantial margin).
For example, instead of compiling this:
long long X2(long long Y) { return Y << 2; }
to:
X3_2:
movl 4(%esp), %eax
movl 8(%esp), %edx
shldl $2, %eax, %edx
shll $2, %eax
ret
Compile it to:
X2:
movl 4(%esp), %eax
movl 8(%esp), %ecx
movl %eax, %edx
shrl $30, %edx
leal (%edx,%ecx,4), %edx
shll $2, %eax
ret
Likewise, for << 3, compile to:
X3:
movl 4(%esp), %eax
movl 8(%esp), %ecx
movl %eax, %edx
shrl $29, %edx
leal (%edx,%ecx,8), %edx
shll $3, %eax
ret
This matches icc, except that icc open codes the shifts as adds on the P4.
llvm-svn: 17707
2004-11-13 20:48:57 +00:00
ef6bd92a8c
Add missing check
...
llvm-svn: 17706
2004-11-13 20:04:38 +00:00
8d521bb16e
Compile:
...
long long X3_2(long long Y) { return Y+Y; }
int X(int Y) { return Y+Y; }
into:
X3_2:
movl 4(%esp), %eax
movl 8(%esp), %edx
addl %eax, %eax
adcl %edx, %edx
ret
X:
movl 4(%esp), %eax
addl %eax, %eax
ret
instead of:
X3_2:
movl 4(%esp), %eax
movl 8(%esp), %edx
shldl $1, %eax, %edx
shll $1, %eax
ret
X:
movl 4(%esp), %eax
shll $1, %eax
ret
llvm-svn: 17705
2004-11-13 20:03:48 +00:00
04570265a5
Correct the name of stosd for the AT&T syntax:
...
It's stosl (l for long == 32 bit).
llvm-svn: 17658
2004-11-10 04:48:15 +00:00
1164955bf1
Allow hbd to be bugpointable on darwin by fixing common and linkonce codegen
...
llvm-svn: 17637
2004-11-09 04:01:18 +00:00
0822032c95
Put int the getReg cast optimization from x86 so that we generate fewer
...
move instructions for the register allocator to coalesce.
llvm-svn: 17608
2004-11-08 02:25:40 +00:00
f5f0b6b6b0
Disable bogus cast elimination when the cast is used by a setcc instruction.
...
llvm-svn: 17583
2004-11-07 20:23:42 +00:00
b3ba9319f1
Decompose* is V9 specific, make it internal
...
llvm-svn: 17547
2004-11-07 00:43:24 +00:00
3dadadc837
Move this file from lib/Transforms/Scalar
...
llvm-svn: 17544
2004-11-07 00:39:09 +00:00
ab79288e37
Fix compilation problem; make the cast and the LHS be the same type.
...
llvm-svn: 17488
2004-11-05 16:17:06 +00:00
429aaa5855
Quiet VC++ warnings
...
llvm-svn: 17484
2004-11-05 04:50:59 +00:00
bff3d4abf0
Thanks to sabre for pointing out that we were incorrectly codegen'ing
...
int test(int x) { return 32768 - x; }
Fixed by teaching the function that checks a constant's validity to be used
as an immediate argument about subtract-from instructions.
llvm-svn: 17476
2004-11-04 19:43:18 +00:00
0da246f535
Handle "call" operands of type long/ulong passed in registers.
...
llvm-svn: 17464
2004-11-04 00:27:04 +00:00
cff3b41e95
Fix this function to not say that longs have 8-byte alignment on X86/PPC.
...
This method is really a gross hack, but at least we can make it work on
the targets we support right now.
This bug fix stops a crash in a testcase reduced from 176.gcc
llvm-svn: 17443
2004-11-02 22:18:18 +00:00
444be61ea6
Added gross hacks such as creating my own def-use map, and picking on Instruction that I can add all my TmpInstructions to its MCFI.
...
llvm-svn: 17441
2004-11-02 21:04:56 +00:00
99d7bb3378
Fix a warning
...
llvm-svn: 17431
2004-11-02 15:27:57 +00:00
720eb217a7
Add placeholder variable to make Win32 work, applied for Morten Ofstad
...
llvm-svn: 17406
2004-11-01 20:10:20 +00:00
f88808ae43
Internalize variable names to prevent recursive assignment. Cleanup docs.
...
llvm-svn: 17359
2004-10-30 09:19:36 +00:00
ddebd1eeaa
Fixed bug with infinite epilogues.
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Fixed issue with generating the partial order. It now adds the nodes not in recurrences in sets for each connected component.
llvm-svn: 17351
2004-10-30 00:39:07 +00:00
b87e08e0ef
Change name of target lib to conform to new naming scheme.
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llvm-svn: 17347
2004-10-29 21:57:16 +00:00
6254a798ca
Remove dependency on MRegisterInfo::getRegClass
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llvm-svn: 17346
2004-10-29 21:42:27 +00:00
57cbe39d1e
Change Library Names Not To Conflict With Others When Installed
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llvm-svn: 17286
2004-10-27 23:18:45 +00:00
a2b117c68a
Move destructor out of line to avoid vtable emission in every file that includes the header. Thanks to sabre.
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llvm-svn: 17278
2004-10-27 06:00:53 +00:00
c193790dbb
Fix the build by eliminating some more dead code. That'll learn me not to listen to Reid
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llvm-svn: 17275
2004-10-27 05:44:23 +00:00
7fed324ffc
Remove include of MRegisterInfo.h, since it is already included by
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SkeletonGenRegisterInfo.h.inc
llvm-svn: 17245
2004-10-26 06:04:23 +00:00
dd8f1d8b77
Remove file that is no longer used, and move include of MRegisterInfo.h
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from PowerPCFrameInfo.h to PowerPCAsmPrinter.cpp where it is actually
needed.
llvm-svn: 17244
2004-10-26 06:02:38 +00:00
47b9d33f5b
Eliminate usage of MRegisterInfo::getRegClass(physreg)
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llvm-svn: 17240
2004-10-26 05:40:45 +00:00
4c6e1d694c
Update to-do list
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llvm-svn: 17235
2004-10-26 04:10:53 +00:00
26feb4f6d8
Fix treecc. Also fix a latent bug in emitBinaryConstOperation that would
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allow and const, 0 to be incorrectly codegen'd into a rlwinm instruction.
llvm-svn: 17234
2004-10-26 03:48:25 +00:00
ff43ef3cc5
Disable the JIT until it can sorta kinda work.
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llvm-svn: 17230
2004-10-25 20:53:41 +00:00
21c6c41dcc
Remove dead assert
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llvm-svn: 17221
2004-10-25 19:04:01 +00:00
7eeed938bf
Removed dead method, printPHICopiesForSuccessors().
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llvm-svn: 17216
2004-10-25 18:41:50 +00:00
a564e9e0ba
Modified switch generation so that only the phi values associated with the
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destination basic block are copied.
llvm-svn: 17212
2004-10-25 18:30:09 +00:00
74b7c1f3e0
Implement more complete and correct codegen for bitfield inserts, as tested
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by the recently committed rlwimi.ll test file. Also commit initial code
for bitfield extract, although it is turned off until fully debugged.
llvm-svn: 17207
2004-10-24 10:33:30 +00:00
9ce0da9e90
* Correctly handle the MovePCtoLR pseudo-instr with a bl to next instr
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* Stop the confusion of using rv and Addr for global addresses: just use rv
llvm-svn: 17195
2004-10-23 23:47:34 +00:00
f1f6270708
Add BA, BL, and BLA opcodes
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llvm-svn: 17193
2004-10-23 20:29:24 +00:00
421c3c1ec4
* Do not emit IMPLICIT_DEF pseudo-instructions
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* Convert register numbers from their opcode value to the real value, e.g.
PPC::R1 => 1 and PPC::F1 => 1
* Add correct handling of loading of global values which are PC-relative --
implement ha16() and lo16()
llvm-svn: 17190
2004-10-23 18:28:01 +00:00
15b0fb5678
DForm_1, particularly used by store instructions, needs the immediate operand to
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be listed second as that is how the instructions are usually created (and is the
correct asm syntax) so that it's assembled correctly from its constituents
llvm-svn: 17183
2004-10-23 06:08:38 +00:00
e882d30aa1
Fix the SPR field for MTLR, MFLR, MTCTR, and MFCTR instructions.
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The decimal value given in the manual (8 or 9) really needs to be multiplied by
a factor of 32 because of the group of 5 zero bits after the register code.
llvm-svn: 17182
2004-10-23 06:05:49 +00:00
55a3ccd035
The value of the XO field for MFLR and MFCTR is 339, not 399
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llvm-svn: 17181
2004-10-23 05:38:55 +00:00
101d5d62d5
Remove extraneous blank line
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llvm-svn: 17180
2004-10-23 04:59:22 +00:00
cea2e46821
Align function arguments in function headers
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llvm-svn: 17178
2004-10-23 04:58:32 +00:00
6cadac8f43
Kill casts from integer types to unsigned byte, when the cast was only used
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as the shift amount operand to a shift instruction. This was causing us to
emit unnecessary clear operations for code such as:
int foo(int x) { return 1 << x; }
llvm-svn: 17175
2004-10-23 00:50:23 +00:00
4755617619
Clean up the output from this makefile so its not verbose.
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llvm-svn: 17173
2004-10-22 23:24:39 +00:00
e60a3fb063
Adjust rules for building .inc files due to Reid's changes of Makefile.rules
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llvm-svn: 17169
2004-10-22 22:16:24 +00:00
30d8baea8d
Adjust to changes in Makefile.rules
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llvm-svn: 17167
2004-10-22 21:02:08 +00:00
c1c320c335
We won't use automake
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llvm-svn: 17155
2004-10-22 03:35:04 +00:00
a6ecf271db
Remove debug code emitter from the JIT
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llvm-svn: 17151
2004-10-21 03:07:38 +00:00
757cc0e84c
Make this compile.
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llvm-svn: 17150
2004-10-21 02:44:16 +00:00
2beb63a65a
* Added basic support for JITing functions, basic blocks, instruction encoding,
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including registers, constants, and partial support for global addresses
* The JIT is disabled by default to allow building llvm-gcc, which wants to test
running programs during configure
llvm-svn: 17149
2004-10-21 01:42:02 +00:00
86b5f8075c
Don't clear or sign extend bool->int. This fires a few dozen times on the test suite
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llvm-svn: 17147
2004-10-20 21:55:41 +00:00
85b380582e
Small performance improvement in generated C code:
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Instead of unconditionally copying all phi node values into temporaries for
all successor blocks, generate code that will determine what successor
block will be called and then copy only those phi node values needed by
the successor block.
This seems to cut down namd execution time from being 8% higher than GCC to
4% higher than GCC.
llvm-svn: 17144
2004-10-20 14:38:39 +00:00
e2ada0413e
* Add baseline structural JIT code, but disable the JIT to allow llvm-gcc builds
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- Support added for functions, basic blocks, constant pool, constants,
registers, and some basic support for globals, all untested
* Turn assert()s into abort()s so that unimplemented functions fail in release
llvm-svn: 17143
2004-10-19 19:49:42 +00:00
f3499acc16
Simplify mapping info generation. In particular, the LLVM-to-MachineInstr map
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is no longer emitted, and we do not reference any MachineCodeForInstruction
information.
llvm-svn: 17138
2004-10-19 05:15:21 +00:00
6a11a75f31
Initial automake generated Makefile template
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llvm-svn: 17136
2004-10-18 23:55:41 +00:00
fbc070bfdc
Improve compatibility with VC++, patch contributed by Morten Ofstad!
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llvm-svn: 17126
2004-10-18 15:54:17 +00:00
53058663aa
Print a semicolon for the unreacahble instruction. This fixes problems
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where C requires semicolons in some cases to indicate null statements.
llvm-svn: 17107
2004-10-17 23:49:11 +00:00
844186b8b4
Generate correct stubs for weak-linked symbols
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llvm-svn: 17101
2004-10-17 23:01:34 +00:00
621c413a1b
The first hunk corrects a bug when printing undef null values. We would print
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0->field, which is illegal. Now we print ((foo*)0)->field.
The second hunk is an optimization to not print undefined phi values.
llvm-svn: 17094
2004-10-17 17:48:59 +00:00
068555314b
Don't print stuff out from the code generator. This broke the JIT horribly
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last night. :) bork!
llvm-svn: 17093
2004-10-17 17:40:50 +00:00
f476d84b69
Make the library name SparcV9 specific
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llvm-svn: 17089
2004-10-17 15:01:12 +00:00
b7c9d5444b
Consolidate the definitions
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llvm-svn: 17088
2004-10-17 15:00:26 +00:00
de028a4a69
PPC32GenCodeEmitter instead of PowerPCGenCodeEmitter
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llvm-svn: 17087
2004-10-17 14:59:38 +00:00
839abf57a6
Rewrite support for cast uint -> FP. In particular, we used to compile this:
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double %test(uint %X) {
%tmp.1 = cast uint %X to double ; <double> [#uses=1]
ret double %tmp.1
}
into:
test:
sub %ESP, 8
mov %EAX, DWORD PTR [%ESP + 12]
mov %ECX, 0
mov DWORD PTR [%ESP], %EAX
mov DWORD PTR [%ESP + 4], %ECX
fild QWORD PTR [%ESP]
add %ESP, 8
ret
... which basically zero extends to 8 bytes, then does an fild for an
8-byte signed int.
Now we generate this:
test:
sub %ESP, 4
mov %EAX, DWORD PTR [%ESP + 8]
mov DWORD PTR [%ESP], %EAX
fild DWORD PTR [%ESP]
shr %EAX, 31
fadd DWORD PTR [.CPItest_0 + 4*%EAX]
add %ESP, 4
ret
.section .rodata
.align 4
.CPItest_0:
.quad 5728578726015270912
This does a 32-bit signed integer load, then adds in an offset if the sign
bit of the integer was set.
It turns out that this is substantially faster than the preceeding sequence.
Consider this testcase:
unsigned a[2]={1,2};
volatile double G;
void main() {
int i;
for (i=0; i<100000000; ++i )
G += a[i&1];
}
On zion (a P4 Xeon, 3Ghz), this patch speeds up the testcase from 2.140s
to 0.94s.
On apoc, an athlon MP 2100+, this patch speeds up the testcase from 1.72s
to 1.34s.
Note that the program takes 2.5s/1.97s on zion/apoc with GCC 3.3 -O3
-fomit-frame-pointer.
llvm-svn: 17083
2004-10-17 08:01:28 +00:00
112fd88a05
Unify handling of constant pool indexes with the other code paths, allowing
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us to use index registers for CPI's
llvm-svn: 17082
2004-10-17 07:49:45 +00:00
af19d396ac
Give the asmprinter the ability to print memrefs with a constant pool index,
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index reg and scale
llvm-svn: 17081
2004-10-17 07:16:32 +00:00
653d8663fe
fold:
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%X = and Y, constantint
%Z = setcc %X, 0
instead of emitting:
and %EAX, 3
test %EAX, %EAX
je .LBBfoo2_2 # UnifiedReturnBlock
We now emit:
test %EAX, 3
je .LBBfoo2_2 # UnifiedReturnBlock
This triggers 581 times on 176.gcc for example.
llvm-svn: 17080
2004-10-17 06:10:40 +00:00
e234a21488
All of these labels are off by one now that the unreachable instruction exists
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llvm-svn: 17079
2004-10-17 05:37:47 +00:00
2c873ca365
Implement bitfield insert by recognizing the following pattern:
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1. optional shift left
2. and x, immX
3. and y, immY
4. or z, x, y
==> rlwimi z, x, y, shift, mask begin, mask end
where immX == ~immY and immX is a run of set bits. This transformation
fires 32 times on voronoi, once on espresso, and probably several
dozen times on external benchmarks such as gcc.
To put this in terms of actual code generated for
struct B { unsigned a : 3; unsigned b : 2; };
void storeA (struct B *b, int v) { b->a = v;}
void storeB (struct B *b, int v) { b->b = v;}
Old:
_storeA:
rlwinm r2, r4, 0, 29, 31
lwz r4, 0(r3)
rlwinm r4, r4, 0, 0, 28
or r2, r4, r2
stw r2, 0(r3)
blr
_storeB:
rlwinm r2, r4, 3, 0, 28
rlwinm r2, r2, 0, 27, 28
lwz r4, 0(r3)
rlwinm r4, r4, 0, 29, 26
or r2, r2, r4
stw r2, 0(r3)
blr
New:
_storeA:
lwz r2, 0(r3)
rlwimi r2, r4, 0, 29, 31
stw r2, 0(r3)
blr
_storeB:
lwz r2, 0(r3)
rlwimi r2, r4, 3, 27, 28
stw r2, 0(r3)
blr
llvm-svn: 17078
2004-10-17 05:19:20 +00:00
f6666db032
I forgot that sparc no longer uses the shared asmwriter. Give it support
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for undef.
llvm-svn: 17075
2004-10-17 02:44:45 +00:00
37b138a00b
Add support for unreachable and undef
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llvm-svn: 17074
2004-10-17 02:42:42 +00:00
29dc5f2a3e
Finally fix one of the oldest FIXMEs in the PowerPC backend: correctly
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flag rotate left word immediate then mask insert (rlwimi) as a two-address
instruction, and update the ISel usage of the instruction accordingly.
This will allow us to properly schedule rlwimi, and use it to efficiently
codegen bitfield operations.
llvm-svn: 17068
2004-10-16 20:43:38 +00:00
Chris Lattner