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Author SHA1 Message Date
Ehsan Amiri 1e9de0215f [SVE][AArch64] Adding pattern matching for some SVE instructions. 
Adding patten matching for two SVE intrinsics: frecps and frsqrts.
Also added patterns for fsub and fmul - these SDNodes directly correspond
to machine instructions.

Review: https://reviews.llvm.org/D68476
Patch authored by mgudim (Mikhail Gudim).
 2019-10-29 13:17:30 -04:00
Jinsong Ji 230cf9a360 [AArch64][SVE] Move the testcase into CodeGen dir 
https://reviews.llvm.org/rL373600 added an AArch64 testcase in top dir
which should be moved to Codegen dir.

llvm-svn: 373657
 2019-10-03 20:21:23 +00:00