Commit Graph

18615 Commits

Author SHA1 Message Date
Benjamin Kramer 185579bf0c [SDag switch lowering] Simplify code a bit. No functional change intended.
llvm-svn: 239056
2015-06-04 17:07:59 +00:00
Matt Arsenault f72b49bc17 CodeGenPrepare: Provide address space to isLegalAddressingMode
Use -1 as the address space if it can't be determined.

llvm-svn: 239052
2015-06-04 16:17:38 +00:00
Matt Arsenault ca519dc28b Pass address space to isLegalAddressingMode in DAGCombiner
No test because I don't know of a target that makes use
of address spaces and indexed load / store.

llvm-svn: 239051
2015-06-04 16:17:34 +00:00
Hans Wennborg d922915685 Switch lowering: fix assert in buildBitTests (PR23738)
When checking (High - Low + 1).sle(BitWidth), BitWidth would be truncated
to the size of the left-hand side. In the case of this PR, the left-hand
side was i4, so BitWidth=64 got truncated to 0 and the assert failed.

llvm-svn: 239048
2015-06-04 15:55:00 +00:00
James Molloy 37593732a4 Don't create a MIN/MAX node if the underlying compare has more than one use.
If the compare in a select pattern has another use then it can't be removed, so we'd just
be creating repeated code if we created a min/max node.

Spotted by Matt Arsenault!

llvm-svn: 239037
2015-06-04 13:48:23 +00:00
Sanjoy Das 513aadecac [SelectionDAG] Fix PR23603.
Summary:
LLVM's MI level notion of invariant_load is different from LLVM's IR
level notion of invariant_load with respect to dereferenceability.  The
IR notion of invariant_load only guarantees that all *non-faulting*
invariant loads result in the same value.  The MI notion of invariant
load guarantees that the load can be legally moved to any location
within its containing function.  The MI notion of invariant_load is
stronger than the IR notion of invariant_load -- an MI invariant_load is
an IR invariant_load + a guarantee that the location being loaded from
is dereferenceable throughout the function's lifetime.

Reviewers: hfinkel, reames

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10075

llvm-svn: 238881
2015-06-02 22:33:30 +00:00
Rafael Espindola a869576008 Create a MCSymbolELF.
This create a MCSymbolELF class and moves SymbolSize since only ELF
needs a size expression.

This reduces the size of MCSymbol from 56 to 48 bytes.

llvm-svn: 238801
2015-06-02 00:25:12 +00:00
Matthias Braun c1e029e93d LiveRangeEdit: Fix liveranges not shrinking on subrange kill.
If a dead instruction we may not only have a last-use in the main live
range but also in a subregister range if subregisters are tracked. We
need to partially rebuild live ranges in both cases.

The testcase only broke when subregister liveness was enabled. I
commited it in the current form because there is currently no flag to
enable/disable subregister liveness.

This fixes PR23720.

llvm-svn: 238785
2015-06-01 21:26:26 +00:00
Owen Anderson 55313d21dc Disable MachineSink on convergent operations, similar to how IR Sink is
restricted.  No test because no in-tree target currently has convergent
MachineInstr's.

llvm-svn: 238763
2015-06-01 17:26:30 +00:00
Matt Arsenault bd7d80a4a6 Add address space argument to isLegalAddressingMode
This is important because of different addressing modes
depending on the address space for GPU targets.

This only adds the argument, and does not update
any of the uses to provide the correct address space.

llvm-svn: 238723
2015-06-01 05:31:59 +00:00
Chandler Carruth 502b23a7a9 [sdag] Add the helper I most want to the DAG -- building a bitcast
around a value using its existing SDLoc.

Start using this in just one function to save omg lines of code.

llvm-svn: 238638
2015-05-30 04:14:10 +00:00
Jim Grosbach 13760bd152 MC: Clean up MCExpr naming. NFC.
llvm-svn: 238634
2015-05-30 01:25:56 +00:00
Fiona Glaser b82e33106b SelectionDAG: fix logic for promoting shift types
r238503 fixed the problem of too-small shift types by promoting them
during legalization, but the correct solution is to promote only the
operands that actually demand promotion.

This fixes a crash on an out-of-tree target caused by trying to
promote an operand that can't be promoted.

llvm-svn: 238632
2015-05-29 23:37:22 +00:00
Benjamin Kramer f5e2fc474d Replace push_back(Constructor(foo)) with emplace_back(foo) for non-trivial types
If the type isn't trivially moveable emplace can skip a potentially
expensive move. It also saves a couple of characters.


Call sites were found with the ASTMatcher + some semi-automated cleanup.

memberCallExpr(
    argumentCountIs(1), callee(methodDecl(hasName("push_back"))),
    on(hasType(recordDecl(has(namedDecl(hasName("emplace_back")))))),
    hasArgument(0, bindTemporaryExpr(
                       hasType(recordDecl(hasNonTrivialDestructor())),
                       has(constructExpr()))),
    unless(isInTemplateInstantiation()))

No functional change intended.

llvm-svn: 238602
2015-05-29 19:43:39 +00:00
Matthias Braun 165d467125 MachineCopyPropagation: Remove the copies instead of using KILL instructions.
For some history here see the commit messages of r199797 and r169060.

The original intent was to fix cases like:

%EAX<def> = COPY %ECX<kill>, %RAX<imp-def>
%RCX<def> = COPY %RAX<kill>

where simply removing the copies would have RCX undefined as in terms of
machine operands only the ECX part of it is defined. The machine
verifier would complain about this so 169060 changed such COPY
instructions into KILL instructions so some super-register imp-defs
would be preserved. In r199797 it was finally decided to always do this
regardless of super-register defs.

But this is wrong, consider:
R1 = COPY R0
...
R0 = COPY R1
getting changed to:
R1 = KILL R0
...
R0 = KILL R1

It now looks like R0 dies at the first KILL and won't be alive until the
second KILL, while in reality R0 is alive and must not change in this
part of the program.

As this only happens after register allocation there is not much code
still performing liveness queries so the issue was not noticed.  In fact
I didn't manage to create a testcase for this, without unrelated changes
I am working on at the moment.

The fix is simple: As of r223896 the MachineVerifier allows reads from
partially defined registers, so the whole transforming COPY->KILL thing
is not necessary anymore. This patch also changes a similar (but more
benign case as the def and src are the same register) case in the
VirtRegRewriter.

Differential Revision: http://reviews.llvm.org/D10117

llvm-svn: 238588
2015-05-29 18:19:25 +00:00
Alex Lorenz 09b832cac5 MIR Serialization: use correct line and column numbers for LLVM IR errors.
This commit translates the line and column numbers for LLVM IR
errors from the numbers in the YAML block scalar to the numbers 
in the MIR file so that the MIRParser users can report LLVM IR 
errors with the correct line and column numbers.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10108

llvm-svn: 238576
2015-05-29 17:05:41 +00:00
Reid Kleckner 1d3d4adbb9 [WinEH] Emit EH tables for __CxxFrameHandler3 on 32-bit x86
Small (really small!) C++ exception handling examples work on 32-bit x86
now.

This change disables the use of .seh_* directives in WinException when
CFI is not in use. It also uses absolute symbol references in the tables
instead of imagerel32 relocations.

Also fixes a cache invalidation bug in MMI personality classification.

llvm-svn: 238575
2015-05-29 17:00:57 +00:00
Matthias Braun 27a6cfd823 This should have been a reference
llvm-svn: 238540
2015-05-29 02:59:59 +00:00
Matthias Braun e41e146c16 CodeGen: Use mop_iterator instead of MIOperands/ConstMIOperands
MIOperands/ConstMIOperands are classes iterating over the MachineOperand
of a MachineInstr, however MachineInstr::mop_iterator does the same
thing.

I assume these two iterators exist to have a uniform interface to
iterate over the operands of a machine instruction bundle and a single
machine instruction. However in practice I find it more confusing to have 2
different iterator classes, so this patch transforms (nearly all) the
code to use mop_iterators.

The only exception being MIOperands::anlayzePhysReg() and
MIOperands::analyzeVirtReg() still needing an equivalent, I leave that
as an exercise for the next patch.

Differential Revision: http://reviews.llvm.org/D9932

This version is slightly modified from the proposed revision in that it
introduces MachineInstr::getOperandNo to avoid the extra counting
variable in the few loops that previously used MIOperands::getOperandNo.

llvm-svn: 238539
2015-05-29 02:56:46 +00:00
Matthias Braun 111f5d88fb MachineFrameInfo: Simplify pristine register calculation.
About pristine regsiters:
Pristine registers "hold a value that is useless to the current
function, but that must be preserved - they are callee saved registers
that have not been saved." This concept saves compile time as it frees
the prologue/epilogue inserter from adding every such register to every
basic blocks live-in list.

However the current code in getPristineRegs is formulated in a
complicated way: Inside the function prologue and epilogue all callee
saves are considered pristine, while in the rest of the code only the
non-saved ones are considered pristine.  This requires logic to
differentiate between prologue/epilogue and the rest and in the presence
of shrink-wrapping this even becomes complicated/expensive.  It's also
unnecessary because the prologue epilogue inserters already mark
callee-save registers that are saved/restores properly in the respective
blocks in the prologue/epilogue (see updateLiveness() in
PrologueEpilogueInserter.cpp). So only declaring non-saved/restored
callee saved registers as pristine just works.

Differential Revision: http://reviews.llvm.org/D10101

llvm-svn: 238524
2015-05-28 23:20:35 +00:00
Reid Kleckner 60b640bb80 Rename Win64Exception.(cpp|h) to WinException.(cpp|h)
This is in preparation for reusing this for 32-bit x86 EH table
emission.  Also updates the type name for consistency. NFC

llvm-svn: 238521
2015-05-28 22:47:01 +00:00
Alex Lorenz 78d7831b0f MIR Serialization: print and parse machine function names.
This commit introduces a serializable structure called
'llvm::yaml::MachineFunction' that stores the machine
function's name. This structure will mirror the machine 
function's state in the future.

This commit prints machine functions as YAML documents
containing a YAML mapping that stores the state of a machine
function. This commit also parses the YAML documents
that contain the machine functions.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D9841

llvm-svn: 238519
2015-05-28 22:41:12 +00:00
Quentin Colombet 75afbfd4a1 [MachineCopyPropagation] Fix a bug with undef handling when the value is actualy alive.
Test case will follow.

llvm-svn: 238518
2015-05-28 22:38:40 +00:00
Reid Kleckner fe4d491bd9 [WinEH] Start inserting state number stores for C++ EH
This moves all the state numbering code for C++ EH to WinEHPrepare so
that we can call it from the X86 state numbering IR pass that runs
before isel.

Now we just call the same state numbering machinery and insert a bunch
of stores. It also populates MachineModuleInfo with information about
the current function.

llvm-svn: 238514
2015-05-28 22:00:24 +00:00
David Majnemer 22d2b02706 [SelectionDAG] Scalar shift amounts may require legalization
The shift amount may be too small to cope with promoted left hand side,
make sure to promote it as well.

This fixes PR23664.

llvm-svn: 238503
2015-05-28 21:29:59 +00:00
Duncan P. N. Exon Smith 8d3197f657 AsmPrinter: Stop exposing underlying DIE children list, NFC
Update `DIE` API to hide the implementation of `DIE::Children` so we can
swap it out.

llvm-svn: 238468
2015-05-28 19:56:34 +00:00
Duncan P. N. Exon Smith b04fb5ed25 AsmPrinter: Rename begin_values() => values_begin(), NFC
llvm-svn: 238456
2015-05-28 18:55:38 +00:00
Benjamin Kramer 5188a2af72 [AsmPrinter] Destroy allocated DIEAbbrevs on teardown.
DIEAbbrev contains a SmallVector that can leak for overly large abbrevs. They
used to be owned by the DIE, but after the recent refactoring DWARFFile
allocates its own abbrevs.

Leak found by asan.

llvm-svn: 238418
2015-05-28 12:55:43 +00:00
Duncan P. N. Exon Smith a68b880d69 AsmPrinter: Avoid a warning in NDEBUG, NFC
Should fix the -Werror release build:
http://lab.llvm.org:8011/builders/lld-x86_64-darwin13/builds/11113

llvm-svn: 238375
2015-05-27 23:02:36 +00:00
Duncan P. N. Exon Smith 6289892c20 AsmPrinter: Return added DIE from DIE::addChild()
Change `DIE::addChild()` to return a reference to the just-added node,
and update consumers to use it directly.  An upcoming commit will
abstract away (and eventually change) the underlying storage of
`DIE::Children`.

llvm-svn: 238372
2015-05-27 22:59:03 +00:00
Fiona Glaser ca706e54a9 RegisterPressure: fix debug prints in case of physical registers
llvm-svn: 238371
2015-05-27 22:51:47 +00:00
Duncan P. N. Exon Smith 88a8fc5448 AsmPrinter: Stop exposing underlying DIEValue list, NFC
Change the `DIE` API to hide the implementation of the list of
`DIEValue`s.

llvm-svn: 238369
2015-05-27 22:44:06 +00:00
Duncan P. N. Exon Smith f3a6a67ffd AsmPrinter: Remove DIEHash::AttrEntry, NFC
Remove "the most boring struct ever" (thanks to review by Eric).

llvm-svn: 238366
2015-05-27 22:36:37 +00:00
Duncan P. N. Exon Smith 815a6eb55d AsmPrinter: Store abbreviation data directly in DIE and DIEValue
Stop storing a `DIEAbbrev` in `DIE`, since the data fits neatly inside
the `DIEValue` list.  Besides being a cleaner data structure (avoiding
the parallel arrays), this gives us more freedom to rearrange the
`DIEValue` list.

This fixes the temporary memory regression from 845 MB up to 879 MB, and
drops it further to 829 MB for a net memory decrease of around 1.9%
(incremental decrease around 5.7%).

(I'm looking at `llc` memory usage on `verify-uselistorder.lto.opt.bc`;
see r236629 for details.)

llvm-svn: 238364
2015-05-27 22:31:41 +00:00
Duncan P. N. Exon Smith e7e1d0c706 Reapply "AsmPrinter: Change DIEValue to be stored by value"
This reverts commit r238350, effectively reapplying r238349 after fixing
(all?) the problems, all somehow related to how I was using
`AlignedArrayCharUnion<>` inside `DIEValue`:

  - MSVC can only handle `sizeof()` on types, not values.  Change the
    assert.
  - GCC doesn't know the `is_trivially_copyable` type trait.  Instead of
    asserting it, add destructors.
  - Call placement new even when constructing POD (i.e., the pointers).
  - Instead of copying the char buffer, copy the casted classes.

I've left in a couple of `static_assert`s that I think both MSVC and GCC
know how to handle.  If the bots disagree with me, I'll remove them.

  - Check that the constructed type is either standard layout or a
    pointer.  This protects against a programming error: we really want
    the "small" `DIEValue`s to be small and simple, so don't
    accidentally change them not to be.
  - Similarly, check that the size of the buffer is no bigger than a
    `uint64_t` or a pointer.  (I thought checking against
    `sizeof(uint64_t)` would be good enough, but Chandler suggested that
    pointers might sometimes be bigger than that in the context of
    sanitizers.)

I've also committed r238359 in the meantime, which introduces a
DIEValue.def to simplify dispatching between the various types (thanks
to a review comment by David Blaikie).  Without that, this commit would
be almost unintelligible.

Here's the original commit message:
--
Change `DIEValue` to be stored/passed/etc. by value, instead of
reference.  It's now a discriminated union, with a `Val` field storing
the actual type.  The classes that used to inherit from `DIEValue` no
longer do.  There are two categories of these:

  - Small values fit in a single pointer and are stored by value.
  - Large values require auxiliary storage, and are stored by reference.

The only non-mechanical change is to tools/dsymutil/DwarfLinker.cpp.  It
was relying on `DIEInteger`s being passed around by reference, so I
replaced that assumption with a `PatchLocation` type that stores a safe
reference to where the `DIEInteger` lives instead.

This commit causes a temporary regression in memory usage, since I've
left merging `DIEAbbrevData` into `DIEValue` for a follow-up commit.  I
measured an increase from 845 MB to 879 MB, around 3.9%.  The follow-up
drops it lower than the starting point, and I've only recently brought
the memory this low anyway, so I'm committing these changes separately
to keep them incremental.  (I also considered swapping the commits, but
the other one first would cause a lot more code churn.)

(I'm looking at `llc` memory usage on `verify-uselistorder.lto.opt.bc`;
see r236629 for details.)
--

llvm-svn: 238362
2015-05-27 22:14:58 +00:00
Duncan P. N. Exon Smith ff18927c58 AsmPrinter: Introduce DIEValue.def, NFC
Use a .def macro file to iterate through the various subclasses of
`DIEValue`.

llvm-svn: 238359
2015-05-27 21:15:43 +00:00
Duncan P. N. Exon Smith 583bc03829 Revert "AsmPrinter: Change DIEValue to be stored by value"
This reverts commit r238349, since it caused some errors on bots:
  - std::is_trivially_copyable isn't available until GCC 5.0.
  - It was complaining about strict aliasing with my use of
    ArrayCharUnion.

llvm-svn: 238350
2015-05-27 19:30:27 +00:00
Duncan P. N. Exon Smith 7735b48a8b AsmPrinter: Change DIEValue to be stored by value
Change `DIEValue` to be stored/passed/etc. by value, instead of
reference.  It's now a discriminated union, with a `Val` field storing
the actual type.  The classes that used to inherit from `DIEValue` no
longer do.  There are two categories of these:

  - Small values fit in a single pointer and are stored by value.
  - Large values require auxiliary storage, and are stored by reference.

The only non-mechanical change is to tools/dsymutil/DwarfLinker.cpp.  It
was relying on `DIEInteger`s being passed around by reference, so I
replaced that assumption with a `PatchLocation` type that stores a safe
reference to where the `DIEInteger` lives instead.

This commit causes a temporary regression in memory usage, since I've
left merging `DIEAbbrevData` into `DIEValue` for a follow-up commit.  I
measured an increase from 845 MB to 879 MB, around 3.9%.  The follow-up
drops it lower than the starting point, and I've only recently brought
the memory this low anyway, so I'm committing these changes separately
to keep them incremental.  (I also considered swapping the commits, but
the other one first would cause a lot more code churn.)

(I'm looking at `llc` memory usage on `verify-uselistorder.lto.opt.bc`;
see r236629 for details.)

llvm-svn: 238349
2015-05-27 19:22:50 +00:00
Alex Lorenz 2bdb4e1063 Resubmit r237954 (MIR Serialization: print and parse LLVM IR using MIR format).
This commit a 3rd attempt at comitting the initial MIR serialization patch.
The first commit (r237708) was reverted in 237730. Then the second commit
(r237954) was reverted in r238007, as the MIR library under CodeGen caused
a circular dependency where the CodeGen library depended on MIR and MIR
library depended on CodeGen.

This commit has fixed the dependencies between CodeGen and MIR by
reorganizing the MIR serialization code - the code that prints out
MIR has been moved to CodeGen, and the MIR library has been renamed
to MIRParser. Now the CodeGen library doesn't depend on the
MIRParser library, thus the circular dependency no longer exists.

--Original Commit Message--

MIR Serialization: print and parse LLVM IR using MIR format.

This commit is the initial commit for the MIR serialization project.
It creates a new library under CodeGen called 'MIR'. This new
library adds a new machine function pass that prints out the LLVM IR
using the MIR format. This pass is then added as a last pass when a
'stop-after' option is used in llc. The new library adds the initial
functionality for parsing of MIR files as well. This commit also
extends the llc tool so that it can recognize and parse MIR input files.

Reviewers: Duncan P. N. Exon Smith, Matthias Braun, Philip Reames

Differential Revision: http://reviews.llvm.org/D9616 

llvm-svn: 238341
2015-05-27 18:02:19 +00:00
Jan Vesely 86f2fda623 SelectionDAG: Don't do libcall on div/rem if divrem is custom
v2: TargetLoweringBase:: -> TargetLowering::
    Use Ops array
v3: Explicitly use value 0 for ?DIV
    Remove redundant newline

Differential revision: http://reviews.llvm.org/D7803
reviewer: ab

llvm-svn: 238336
2015-05-27 16:54:09 +00:00
Rafael Espindola f4a1365387 Use operator<< instead of print in a few more places.
llvm-svn: 238315
2015-05-27 13:05:42 +00:00
Quentin Colombet 8083588a7e [ShrinkWrap] Add a target hook to check whether or not
the target can handle a given basic block as prologue
or epilogue.

Related to <rdar://problem/20821487>

llvm-svn: 238292
2015-05-27 06:25:48 +00:00
Matthias Braun 07a07ba41c MachineBasicBlock: Cleanup computeRegisterLiveness()
- Clean documentation comment
- Change the API to accept an iterator so you can actually pass
  MachineBasicBlock::end() now.
- Add more "const".

llvm-svn: 238288
2015-05-27 05:12:39 +00:00
Akira Hatanaka e36505c7f5 Remove NoFramePointerElim and NoFramePointerElimOverride from TargetOptions and
remove ExecutionEngine's dependence on CodeGen. NFC.

This is a follow-up to r238080.

Differential Revision: http://reviews.llvm.org/D9830

llvm-svn: 238244
2015-05-26 20:17:20 +00:00
Adrian Prantl 6f8c1b6be6 Use "auto &" in range-based for-loop and remove the extra braces.
llvm-svn: 238243
2015-05-26 20:06:51 +00:00
Adrian Prantl 757073191a Fix a use-after-free in a DEBUG output.
llvm-svn: 238242
2015-05-26 20:06:48 +00:00
Matt Arsenault f05b02351f CodeGenPrepare: Don't match addressing modes through addrspacecast
This was resulting in the addrspacecast being removed and incorrectly
replaced with a ptrtoint when sinking.

llvm-svn: 238217
2015-05-26 16:59:43 +00:00
Elena Demikhovsky 1c1391ba24 Added promotion to EXTRACT_SUBVECTOR operand.
I encountered with this case in one of KNL tests for i1 vectors.
v16i1 = EXTRACT_SUBVECTOR v32i1, x

llvm-svn: 238130
2015-05-25 11:33:13 +00:00
NAKAMURA Takumi 5582a6a4a5 Reformat.
llvm-svn: 238126
2015-05-25 01:43:34 +00:00
NAKAMURA Takumi fb3bd7127a Prune CRLFs.
llvm-svn: 238125
2015-05-25 01:43:23 +00:00