9ab3cac694
Revert r135423.
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llvm-svn: 135454
2011-07-19 00:28:24 +00:00
7a16288157
Add APInt(numBits, ArrayRef<uint64_t> bigVal) constructor to prevent future ambiguity
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errors like the one corrected by r135261. Migrate all LLVM callers of the old
constructor to the new one.
llvm-svn: 135431
2011-07-18 21:45:40 +00:00
4dc76f2438
During bottom up fast-isel, instructions emitted to materalize registers are at top of basic block and do not have debug location. This may misguide debugger while entering the basic block and sometimes debugger provides semi useful view of current location to developer by picking up previous known location as current location. Assign a sensible location to the first instruction in a basic block, if it does not have one location derived from source file, so that debugger can provide meaningful user experience to developers in edge cases.
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[take 2]
llvm-svn: 135423
2011-07-18 20:55:23 +00:00
229907cd11
land David Blaikie's patch to de-constify Type, with a few tweaks.
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llvm-svn: 135375
2011-07-18 04:54:35 +00:00
57aa636794
Convert InsertValueInst and ExtractValueInst APIs to use ArrayRef.
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llvm-svn: 135040
2011-07-13 10:26:04 +00:00
0eada03216
Revert r133953 for now.
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llvm-svn: 134116
2011-06-29 23:50:13 +00:00
6cc775f905
- Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and
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sink them into MC layer.
- Added MCInstrInfo, which captures the tablegen generated static data. Chang
TargetInstrInfo so it's based off MCInstrInfo.
llvm-svn: 134021
2011-06-28 19:10:37 +00:00
4dc034df1d
During bottom up fast-isel, instructions emitted to materalize registers are at top of basic block and do not have debug location. This may misguide debugger while entering the basic block and sometimes debugger provides semi useful view of current location to developer by picking up previous known location as current location. Assign a sensible location to the first instruction in a basic block, if it does not have one location derived from source file, so that debugger can provide meaningful user experience to developers in edge cases.
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llvm-svn: 133953
2011-06-27 22:32:04 +00:00
f071d72c44
Handle debug info for i128 constants.
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llvm-svn: 133821
2011-06-24 20:46:11 +00:00
bd375f1a3f
PR10077: fix fast-isel of extractvalue of aggregate constants.
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llvm-svn: 132676
2011-06-06 05:46:34 +00:00
c70355195c
Rewrite fast-isel integer cast handling to handle more cases, and to be simpler and more consistent.
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The practical effects here are that x86-64 fast-isel can now handle trunc from i8 to i1, and ARM fast-isel can handle many more constructs involving integers narrower than 32 bits (including loads, stores, and many integer casts).
rdar://9437928 .
llvm-svn: 132099
2011-05-25 23:49:02 +00:00
a4d4a0162d
Make fast-isel work correctly s/uadd.with.overflow intrinsics.
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llvm-svn: 131420
2011-05-16 21:06:17 +00:00
4c08bb450a
Fix silly typo.
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llvm-svn: 131419
2011-05-16 20:34:53 +00:00
9ac944774f
Basic fast-isel of extractvalue. Not too helpful on its own, given the IR clang generates for cases like this, but it should become more useful soon.
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llvm-svn: 131417
2011-05-16 20:27:46 +00:00
8f1e11cde9
Fix a FIXME by moving the fast-isel implementation of the objectsize intrinsic from the x86 code to the generic code.
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llvm-svn: 131332
2011-05-14 00:47:51 +00:00
68b6b0efb0
Allow FastISel of three-register-operand instructions.
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llvm-svn: 130934
2011-05-05 17:59:04 +00:00
4105ed1523
Make FastEmit_ri_ try a bit harder to succeed for supported operations; FastEmit_i can fail for non-Thumb2 ARM. Makes ARMSimplifyAddress work correctly, and reduces the number of fast-isel bailouts on non-Thumb ARM.
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llvm-svn: 130560
2011-04-29 23:34:52 +00:00
33c133919a
Fix a silly mistake in r130338.
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llvm-svn: 130360
2011-04-28 00:42:03 +00:00
406c471b69
Make the fast-isel code for literal 0.0 a bit shorter/faster, since 0.0 is common. rdar://problem/9303592 .
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llvm-svn: 130338
2011-04-27 22:41:55 +00:00
121d27e9e4
Remove unused function.
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llvm-svn: 130337
2011-04-27 22:21:02 +00:00
7da91aee83
Fast-isel support for simple inline asms.
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llvm-svn: 130205
2011-04-26 17:18:34 +00:00
dd450b86cf
Teach FastISel to deal with instructions that have two immediate operands.
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llvm-svn: 130033
2011-04-22 23:38:06 +00:00
91328b317b
Implement support for x86 fastisel of small fixed-sized memcpys, which are generated
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en-mass for C++ PODs. On my c++ test file, this cuts the fast isel rejects by 10x
and shrinks the generated .s file by 5%
llvm-svn: 129755
2011-04-19 05:52:03 +00:00
48f75ad678
while we're at it, handle 'sdiv exact' of a power of 2 also,
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this fixes a few rejects on c++ iterator loops.
llvm-svn: 129694
2011-04-18 07:00:40 +00:00
562d6e82bd
fix rdar://9297011 - udiv by power of two causing fast-isel rejects
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llvm-svn: 129693
2011-04-18 06:55:51 +00:00
b53ccb8e36
1. merge fast-isel-shift-imm.ll into fast-isel-x86-64.ll
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2. implement rdar://9289501 - fast isel should fold trivial multiplies to shifts
3. teach tblgen to handle shift immediates that are different sizes than the
shifted operands, eliminating some code from the X86 fast isel backend.
4. Have FastISel::SelectBinaryOp use (the poorly named) FastEmit_ri_ function
instead of FastEmit_ri to simplify code.
llvm-svn: 129666
2011-04-17 20:23:29 +00:00
fba7ca63cc
fix rdar://9289583 - fast isel should handle non-canonical commutative binops
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allowing us to fold the immediate into the 'and' in this case:
int test1(int i) {
return 8&i;
}
llvm-svn: 129653
2011-04-17 01:16:47 +00:00
0ab5e2cded
Fix a ton of comment typos found by codespell. Patch by
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Luis Felipe Strano Moraes!
llvm-svn: 129558
2011-04-15 05:18:47 +00:00
7c14a558fe
Don't include Operator.h from InstrTypes.h.
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llvm-svn: 129271
2011-04-11 09:35:34 +00:00
66443c034d
Teach FastISel to support register-immediate-immediate instructions.
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llvm-svn: 127496
2011-03-11 21:33:55 +00:00
c24048a718
If dbg_declare() or dbg_value() is not lowered by isel then emit DEBUG message instead of creating DBG_VALUE for undefined value in reg0.
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llvm-svn: 121059
2010-12-06 22:39:26 +00:00
527da1b6e2
Renaming ISD::BIT_CONVERT to ISD::BITCAST to better reflect the LLVM IR concept.
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llvm-svn: 119990
2010-11-23 03:31:01 +00:00
e4682fa8e2
Use frame index, if available for byval argument while lowering dbg_declare. Otherwise let getRegForValue() find register for this argument.
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llvm-svn: 113843
2010-09-14 20:29:31 +00:00
6095d818e5
Add DEBUG message.
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llvm-svn: 113614
2010-09-10 20:32:09 +00:00
541f8012d9
Fix typo.
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llvm-svn: 111223
2010-08-17 01:30:33 +00:00
dde79d8f1a
mass elimination of reliance on automatic iterator dereferencing
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llvm-svn: 109103
2010-07-22 13:36:47 +00:00
b5e918dc05
After a custom inserter, in a block which has constant instructions,
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update the current basic block in addition to the current insert
position, so that they remain consistent. This fixes rdar://8204072.
llvm-svn: 108765
2010-07-19 22:48:56 +00:00
1e936277c3
Revert r108369, sorting llvm.dbg.declare information by source position,
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since it doesn't work for front-ends which don't emit column information
(which includes llvm-gcc in its present configuration), and doesn't
work for clang for K&R style variables where the variables are declared
in a different order from the parameter list.
Instead, make a separate pass through the instructions to collect the
llvm.dbg.declare instructions in order. This ensures that the debug
information for variables is emitted in this order.
llvm-svn: 108538
2010-07-16 17:54:27 +00:00
c12a6731c5
Properly restore DebugLoc after leaving the local constant area.
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llvm-svn: 108364
2010-07-14 22:01:31 +00:00
042523340b
Delete fast-isel's trivial load optimization; it breaks debugging because
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it can look past points where a debugger might modify user variables.
llvm-svn: 108336
2010-07-14 17:25:37 +00:00
1f471435f8
Don't propagate debug locations to instructions for materializing
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constants, since they may not be emited near the other instructions
which get the same line, and this confuses debug info.
llvm-svn: 108302
2010-07-14 01:07:44 +00:00
51642aea77
Use COPY for fast-isel bitconvert, but don't create cross-class copies.
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This doesn't change the behavior of SelectBitcast for X86.
llvm-svn: 108073
2010-07-11 05:16:54 +00:00
7147ab9e78
Use COPY for extracting ImplicitDef'ed values from fast-isel instructions.
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This assumes that the registers can be copied which is probably a safe
assumption.
llvm-svn: 108070
2010-07-11 03:31:05 +00:00
3bb1267431
Use COPY in FastISel everywhere it is safe and trivial.
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The remaining copyRegToReg calls actually check the return value (shock!), so we
cannot trivially replace them with COPY instructions.
llvm-svn: 108069
2010-07-11 03:31:00 +00:00
d7b5ce3312
Reapply bottom-up fast-isel, with several fixes for x86-32:
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- Check getBytesToPopOnReturn().
- Eschew ST0 and ST1 for return values.
- Fix the PIC base register initialization so that it doesn't ever
fail to end up the top of the entry block.
llvm-svn: 108039
2010-07-10 09:00:22 +00:00
6586e9b203
--- Reverse-merging r107947 into '.':
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U utils/TableGen/FastISelEmitter.cpp
--- Reverse-merging r107943 into '.':
U test/CodeGen/X86/fast-isel.ll
U test/CodeGen/X86/fast-isel-loads.ll
U include/llvm/Target/TargetLowering.h
U include/llvm/Support/PassNameParser.h
U include/llvm/CodeGen/FunctionLoweringInfo.h
U include/llvm/CodeGen/CallingConvLower.h
U include/llvm/CodeGen/FastISel.h
U include/llvm/CodeGen/SelectionDAGISel.h
U lib/CodeGen/LLVMTargetMachine.cpp
U lib/CodeGen/CallingConvLower.cpp
U lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
U lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
U lib/CodeGen/SelectionDAG/FastISel.cpp
U lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
U lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
U lib/CodeGen/SelectionDAG/InstrEmitter.cpp
U lib/CodeGen/SelectionDAG/TargetLowering.cpp
U lib/Target/XCore/XCoreISelLowering.cpp
U lib/Target/XCore/XCoreISelLowering.h
U lib/Target/X86/X86ISelLowering.cpp
U lib/Target/X86/X86FastISel.cpp
U lib/Target/X86/X86ISelLowering.h
llvm-svn: 107987
2010-07-09 16:37:18 +00:00
0b5aa1cdd3
Re-apply bottom-up fast-isel, with fixes. Be very careful to avoid emitting
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a DBG_VALUE after a terminator, or emitting any instructions before an EH_LABEL.
llvm-svn: 107943
2010-07-09 00:39:23 +00:00
00264624a9
Convert EXTRACT_SUBREG to COPY when emitting machine instrs.
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EXTRACT_SUBREG no longer appears as a machine instruction. Use COPY instead.
Add isCopy() checks in many places using isMoveInstr() and isExtractSubreg().
The isMoveInstr hook will be removed later.
llvm-svn: 107879
2010-07-08 16:40:22 +00:00
e75704369d
Revert 107840 107839 107813 107804 107800 107797 107791.
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Debug info intrinsics win for now.
llvm-svn: 107850
2010-07-08 01:00:56 +00:00
eb9164dc50
Don't forward-declare registers for static allocas, which we'll
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prefer to materialize as local constants. This fixes the clang
bootstrap abort.
llvm-svn: 107840
2010-07-07 23:52:58 +00:00
Devang Patel