38533d48dd
The way we are trying to figure out banksel immediate operand may yield different results for different type of insns. This will eventually need to be changed but currently let us prevent the crash in cases of incorrect detection of banksel operand.
...
llvm-svn: 68713
2009-04-09 17:06:24 +00:00
44ea053a49
Emit .line debug directives for stoppoints. The debug location is retrieved by the MachineInstr itself, rather than by custom handling the DBG_STOPPOINT nodes.
...
llvm-svn: 68602
2009-04-08 06:24:04 +00:00
4b489c75c2
Handle indirect function calls.
...
Every function has the address of its frame in the beginning of code section.
The frame address is retrieved and used to pass arguments.
llvm-svn: 68597
2009-04-08 05:38:48 +00:00
0b08df8c09
Map stack based frameindices for spills to zero based indices that can be accessed based on an external symbol defining the location of temporary data for a function. For example: we have spill slots addressed as foo.tmp + 0, foo.tmp + 1 etc.
...
llvm-svn: 68442
2009-04-06 10:54:50 +00:00
cc841a3810
To convert the StopPoint insn into an assembler directive by ISel, we need to have access to the line number field. So we convert that info as an operand by custom handling DBG_STOPPOINT in legalize.
...
llvm-svn: 68329
2009-04-02 18:03:10 +00:00
1e8860a8f5
Params are not being generated as static globals now. The caller passes them onto the callee's stack directly and the callee loads the argvals from its own stack. Clang generated frameindexes validatd by recalculating the stack as if all frameindexes represent 1-byte slots.
...
llvm-svn: 68327
2009-04-02 17:42:00 +00:00
5e5a63cf8f
CodeGen still defaults to non-verbose asm, but llc now overrides it and default to verbose.
...
llvm-svn: 67668
2009-03-25 01:47:28 +00:00
f883419b2f
Banksel optimization is now based on the section names of symbols, since the symbols in one section will always be put into one bank.
...
llvm-svn: 66761
2009-03-12 02:10:45 +00:00
c5437ea429
Overhaul my earlier submission due to feedback. It's a large patch, but most of
...
them are generic changes.
- Use the "fast" flag that's already being passed into the asm printers instead
of shoving it into the DwarfWriter.
- Instead of calling "MI->getParent()->getParent()" for every MI, set the
machine function when calling "runOnMachineFunction" in the asm printers.
llvm-svn: 65379
2009-02-24 08:30:20 +00:00
0f4c581c4a
Put code that generates debug labels into TableGen so that it can be used by
...
everyone.
llvm-svn: 64978
2009-02-18 23:12:06 +00:00
c3f7b82628
Function temporaries can not overlap with retval or args.See the comment in source code to know the reason. Anything having .auto. in its name is local to a function in nature irrespective of the linkage specified. print static local variables in module level IDATA section.
...
llvm-svn: 64199
2009-02-10 04:20:26 +00:00
48d6bb9924
Print globl directive for variables with external linkage (global variables).
...
llvm-svn: 63943
2009-02-06 18:24:59 +00:00
964a29f671
Enable emitting of constant values in non-default address space as well. The APIs emitting constants now take an additional parameter signifying the address space in which to emit. The APIs like getData8BitsDirective() etc are made virtual enabling targets to be able to define appropirate directivers for various sizes and address spaces.
...
llvm-svn: 63377
2009-01-30 04:25:10 +00:00
45da8b779c
Checking in conditionals, function call, arrays and libcalls implementation.
...
llvm-svn: 62174
2009-01-13 19:18:47 +00:00
dc020f9c3c
Rename getABITypeSize to getTypePaddedSize, as
...
suggested by Chris.
llvm-svn: 62099
2009-01-12 20:38:59 +00:00
83c70fa3dc
Emit declaration for globals and externs.
...
Custom lower AND, OR, XOR bitwise operations.
llvm-svn: 60098
2008-11-26 10:53:50 +00:00
2ae21ee517
Added a more function PIC16 backend. However to get this working a patch in
...
ExpandIntegerOperand (LegalizeIntegerTypes.cpp) is needed which is yet to be reworked and submitted.
llvm-svn: 59617
2008-11-19 11:00:54 +00:00
0d1e9a8e04
Switch the MachineOperand accessors back to the short names like
...
isReg, etc., from isRegister, etc.
llvm-svn: 57006
2008-10-03 15:45:36 +00:00
69721aa85c
Remove dead code for PIC16 (preparation to switch to new section handling stuff)
...
llvm-svn: 56569
2008-09-24 22:11:26 +00:00
9371964f47
Use raw_ostream throughout the AsmPrinter.
...
llvm-svn: 55092
2008-08-21 00:14:44 +00:00
2dbba985d5
Unneeded include's.
...
llvm-svn: 52478
2008-06-19 01:21:02 +00:00
ce4396bc92
Add CommonLinkage; currently tentative definitions
...
are represented as "weak", but there are subtle differences
in some cases on Darwin, so we need both. The intent
is that "common" will behave identically to "weak" unless
somebody changes their target to do something else.
No functional change as yet.
llvm-svn: 51118
2008-05-14 20:12:51 +00:00
7fc6027873
Detabification. Fixed indentation and spacing.
...
Changed cout to DOUT, and TODOs to FIXMEs.
Other changes as per coding conventions.
llvm-svn: 51105
2008-05-14 11:31:39 +00:00
4394c2376c
Adding files for Microchip's PIC16 target.
...
A brief description about PIC16:
===============================
PIC16 is an 8-bit microcontroller with only one 8-bit register which is the
accumulator. All arithmetic/load/store operations are 8-bit only.
The architecture has two address spaces: program and data. The program memory
is divided into 2K pages and the data memory is divided into banks of 128 byte, with only 80 usable bytes, resulting in an non-contiguous data memory.
It supports direct data memory access (by specifying the address as part of the instruction) and indirect data and program memory access (in an unorthodox fashion which utilize a 16 bit pointer register).
Two classes of registers exist: (8-bit class which is only one
accumulator) (16-bit class, which contains one or more 16 bit
pointer(s))
llvm-svn: 51027
2008-05-13 09:02:57 +00:00
Sanjiv Gupta