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5819 Commits

Author SHA1 Message Date
Rafael Espindola f7d4a9900c Implement a MachineFunctionPass to fix the mul instruction 
llvm-svn: 30485
 2006-09-19 15:49:25 +00:00
Chris Lattner b94df039c0 item done 
llvm-svn: 30483
 2006-09-19 06:19:03 +00:00
Chris Lattner 3c48ea54ee Fold the PPCISD shifts when presented with 0 inputs. This occurs for code 
like:
long long test(long long X, int Y) {
  return 1ULL << Y;
}
long long test2(long long X, int Y) {
  return -1LL << Y;
}

which we used to compile to:

_test:
        li r2, 1
        subfic r3, r5, 32
        li r4, 0
        addi r6, r5, -32
        srw r3, r2, r3
        slw r4, r4, r5
        slw r6, r2, r6
        or r3, r4, r3
        slw r4, r2, r5
        or r3, r3, r6
        blr
_test2:
        li r2, -1
        subfic r3, r5, 32
        addi r6, r5, -32
        srw r3, r2, r3
        slw r4, r2, r5
        slw r2, r2, r6
        or r3, r4, r3
        or r3, r3, r2
        blr

Now we produce:

_test:
        li r2, 1
        addi r3, r5, -32
        subfic r4, r5, 32
        slw r3, r2, r3
        srw r4, r2, r4
        or r3, r4, r3
        slw r4, r2, r5
        blr
_test2:
        li r2, -1
        subfic r3, r5, 32
        addi r6, r5, -32
        srw r3, r2, r3
        slw r4, r2, r5
        slw r2, r2, r6
        or r3, r4, r3
        or r3, r3, r2
        blr

llvm-svn: 30479
 2006-09-19 05:22:59 +00:00
Andrew Lenharth f23e3bfcb2 A pass to remove the worst of the replay trap offenders, and as a bonus, align basic blocks when it is free to do so 
llvm-svn: 30467
 2006-09-18 19:44:29 +00:00
Andrew Lenharth 3aa3ad780e Jump tables on Alpha 
llvm-svn: 30463
 2006-09-18 18:01:03 +00:00
Chris Lattner 523dbc5c19 add a note. Our 64-bit shifts are ~30% slower than gcc's 
llvm-svn: 30457
 2006-09-18 05:36:54 +00:00
Chris Lattner 4a13d3b391 This is closer to what we really want. 
llvm-svn: 30451
 2006-09-18 04:54:35 +00:00
Anton Korobeynikov 6f7072c66a Added some eye-candy for Subtarget type checking 
Added X86 StdCall & FastCall calling conventions. Codegen will follow.

llvm-svn: 30446
 2006-09-17 20:25:45 +00:00
Anton Korobeynikov 0ab01ff6e2 Small fixes for supporting dll* linkage types 
llvm-svn: 30441
 2006-09-17 13:06:18 +00:00
Chris Lattner f7e3478745 add a note noticed through source inspection 
llvm-svn: 30418
 2006-09-16 23:57:51 +00:00
Chris Lattner 63b113f68c add a note 
llvm-svn: 30406
 2006-09-16 03:30:19 +00:00
Chris Lattner c9dc375d3e add a nate note 
llvm-svn: 30399
 2006-09-15 20:31:36 +00:00
Evan Cheng f8464da015 Remove a unnecessary check. 
llvm-svn: 30382
 2006-09-14 23:55:02 +00:00
Chris Lattner 2aa98e0363 add a note 
llvm-svn: 30377
 2006-09-14 20:56:30 +00:00
Anton Korobeynikov d61d39ec53 Adding dllimport, dllexport and external weak linkage types. 
DLL* linkages got full (I hope) codegeneration support in C & both x86
assembler backends.
External weak linkage added for future use, we don't provide any
codegeneration, etc. support for it.

llvm-svn: 30374
 2006-09-14 18:23:27 +00:00
Chris Lattner 1463377ddb add note about switch lowering 
llvm-svn: 30308
 2006-09-13 23:37:16 +00:00
Evan Cheng 92e5113d48 Skip over first operand when determining REX prefix for two-address code. 
llvm-svn: 30300
 2006-09-13 19:07:28 +00:00
Chris Lattner 971e33930d Turn X < 0 -> TEST X,X js 
llvm-svn: 30294
 2006-09-13 17:04:54 +00:00
Chris Lattner 0c9ae46c5f The sense of this branch was inverted :( 
llvm-svn: 30293
 2006-09-13 16:56:12 +00:00
Rafael Espindola 3130a756ef add shifts to addressing mode 1 
llvm-svn: 30291
 2006-09-13 12:09:43 +00:00
Chris Lattner 706dd3e0d4 Fix a regression in the 32-bit port from the 64-bit port landing. 
We now compile CodeGen/X86/lea-2.ll into:

_test:
        movl 4(%esp), %eax
        movl 8(%esp), %ecx
        leal -5(%ecx,%eax,4), %eax
        ret

instead of:

_test:
        movl 4(%esp), %eax
        leal (,%eax,4), %eax
        addl 8(%esp), %eax
        addl $4294967291, %eax
        ret

llvm-svn: 30288
 2006-09-13 04:45:25 +00:00
Chris Lattner e413fea6ac new note 
llvm-svn: 30286
 2006-09-13 04:19:50 +00:00
Chris Lattner 3496710f25 new note 
llvm-svn: 30285
 2006-09-13 03:54:54 +00:00
Chris Lattner 7a627676be Compile X > -1 -> text X,X; js dest 
This implements CodeGen/X86/jump_sign.ll.

llvm-svn: 30283
 2006-09-13 03:22:10 +00:00
Evan Cheng 9a083a4121 Reflects MachineConstantPoolEntry changes. 
llvm-svn: 30279
 2006-09-12 21:04:05 +00:00
Chris Lattner cfb2c32724 add a note 
llvm-svn: 30271
 2006-09-12 06:36:01 +00:00
Chris Lattner 8b4de218d9 Testcase noticed from PR906 
llvm-svn: 30269
 2006-09-11 23:00:56 +00:00
Chris Lattner 6e7286f72a add compilable testcase 
llvm-svn: 30268
 2006-09-11 22:57:51 +00:00
Rafael Espindola c7829d62c0 implement SRL and MUL 
llvm-svn: 30262
 2006-09-11 19:24:19 +00:00
Rafael Espindola bccf9c2f1b add the correct fallback for ARMDAGToDAGISel::SelectAddrMode1 
llvm-svn: 30261
 2006-09-11 19:23:32 +00:00
Rafael Espindola e45a79a9e2 partial implementation of the ARM Addressing Mode 1 
llvm-svn: 30252
 2006-09-11 17:25:40 +00:00
Rafael Espindola ecb0d686f8 call AsmPrinter::doInitialization in ARMAsmPrinter::doInitialization 
llvm-svn: 30246
 2006-09-11 12:49:38 +00:00
Evan Cheng 21a75acc3e Updates. 
llvm-svn: 30245
 2006-09-11 05:35:17 +00:00
Evan Cheng 9e77d9a96b Update README file. 
llvm-svn: 30244
 2006-09-11 05:25:15 +00:00
Evan Cheng 4259a0f654 X86ISD::CMP now produces a chain as well as a flag. Make that the chain 
operand of a conditional branch to allow load folding into CMP / TEST
instructions.

llvm-svn: 30241
 2006-09-11 02:19:56 +00:00
Nate Begeman a0d95a8da9 Behold, more work on relocations. Things are looking pretty good now. 
llvm-svn: 30240
 2006-09-10 23:03:44 +00:00
Anton Korobeynikov fbee8bfe48 Removed unnecessary Mangler creation. 
llvm-svn: 30239
 2006-09-10 21:17:03 +00:00
Chris Lattner fdb3a75942 Add cbe support for powi 
llvm-svn: 30226
 2006-09-09 06:17:12 +00:00
Nate Begeman 69df6132d7 First pass at supporting relocations. Relocations are written correctly to 
the file now, however the relocated address is currently wrong.  Fixing
that will require some deep pondering.

llvm-svn: 30207
 2006-09-08 22:42:09 +00:00
Evan Cheng de33f66286 Fixed a FuseTwoAddrInst() bug: consider GlobalAddress and JumpTableIndex 
in addition to immediate operands.

llvm-svn: 30205
 2006-09-08 21:08:13 +00:00
Rafael Espindola d11fb5d13b implement shl and sra 
llvm-svn: 30191
 2006-09-08 17:36:23 +00:00
Chris Lattner 6c003a7c2d Use __USER_LABEL_PREFIX__ to get the prefix added by the current host. 
llvm-svn: 30190
 2006-09-08 17:03:56 +00:00
Rafael Espindola 4443c7d60a add the eor (xor) instruction 
llvm-svn: 30189
 2006-09-08 16:59:47 +00:00
Jim Laskey 177405376c Missing tab 
llvm-svn: 30188
 2006-09-08 13:06:56 +00:00
Rafael Espindola 778769aafb implement unconditional branches 
fix select.ll

llvm-svn: 30186
 2006-09-08 12:47:03 +00:00
Evan Cheng 7348403d42 Remove TEST64mr. It's same as TEST64rm since and is commutative. 
llvm-svn: 30178
 2006-09-08 06:56:55 +00:00
Evan Cheng 11b0a5dbd4 Committing X86-64 support. 
llvm-svn: 30177
 2006-09-08 06:48:29 +00:00
Nate Begeman c9db83306f We actually do support object file writing, so don't return true (error) 
llvm-svn: 30173
 2006-09-08 03:42:15 +00:00
Evan Cheng 89c5d04b9b - Identify a vector_shuffle that can be turned into an undef, e.g. 
shuffle V1, <undef>, <undef, undef, 4, 5>
- Fix some suspicious logic into LowerVectorShuffle that cause less than
  optimal code by failing to identify MOVL (move to lowest element of a
  vector).

llvm-svn: 30171
 2006-09-08 01:50:06 +00:00
Jim Laskey ae92ce8798 1. Remove condition on delete. 
2. Protect and outline createTargetAsmInfo.

3. Misc. kruft.

llvm-svn: 30169
 2006-09-07 23:39:26 +00:00