2c8bdead9e
Allow machine cse to cse instructions which define physical registers. Controlled by option -machine-cse-phys-defs.
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llvm-svn: 104385
2010-05-21 21:22:19 +00:00
7767d2747b
Add a utility function for conservatively clearing kill flags, and make
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use of it in MachineCSE.
llvm-svn: 103726
2010-05-13 19:24:00 +00:00
4b2ef56ad2
Rewrite machine cse to avoid recursion.
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llvm-svn: 101964
2010-04-21 00:21:07 +00:00
4019d571d9
Typo.
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llvm-svn: 101914
2010-04-20 17:27:38 +00:00
604bc162da
After trivial coalescing, the MI being visited may have become a copy. Avoid adding it to CSE hash table since copies aren't being considered for CSE and they may be deleted.
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rdar://7819990
llvm-svn: 100170
2010-04-02 02:21:24 +00:00
cf7be39e24
dbg_value may end a block.
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llvm-svn: 99378
2010-03-24 01:50:28 +00:00
c7d721aa03
Code clean up.
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llvm-svn: 99319
2010-03-23 20:33:48 +00:00
197bd3eee9
Fix debug_value handling.
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llvm-svn: 98224
2010-03-11 02:10:24 +00:00
4c5f7a7f5e
Add a couple more heuristics to neuter machine cse some more.
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1. Be careful with cse "cheap" expressions. e.g. constant materialization. Only cse them when the common expression is local or in a direct predecessor. We don't want cse of cheap instruction causing other expressions to be spilled.
2. Watch out for the case where the expression doesn't itself uses a virtual register. e.g. lea of frame object. If the common expression itself is used by copies (common for passing addresses to function calls), don't perform the cse. Since these expressions do not use a register, it creates a live range but doesn't close any, we want to be very careful with increasing register pressure.
Note these are heuristics so machine cse doesn't make register allocator unhappy. Once we have proper live range splitting and re-materialization support in place, these should be evaluated again.
Now machine cse is almost always a win on llvm nightly tests on x86 and x86_64.
llvm-svn: 98121
2010-03-10 02:12:03 +00:00
51063739a4
Allow more cross-rc coalescing.
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llvm-svn: 98048
2010-03-09 06:38:17 +00:00
7c699f92cd
Don't do illegal cross-class coalescing.
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llvm-svn: 98044
2010-03-09 03:56:06 +00:00
19e44b4510
- Make the machine cse dumb coalescer (as opposed to the more awesome simple
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coalescer) handle sub-register classes.
- Add heuristics to avoid non-profitable cse. Given the current lack of live
range splitting, avoid cse when an expression has PHI use and the would be
new use is in a BB where the expression wasn't already being used.
llvm-svn: 98043
2010-03-09 03:21:12 +00:00
c9e8621268
Don't waste time trying to CSE labels, phis, inline asm. Definitely avoid cse implicit-def for obvious performance reason.
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llvm-svn: 98009
2010-03-08 23:49:12 +00:00
6ec41ee33c
Restrict machine cse to really trivial coalescing. Leave the heavy lifting to a real coalescer.
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llvm-svn: 98007
2010-03-08 23:28:08 +00:00
0f5f54784a
Don't update physical register def.
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llvm-svn: 97861
2010-03-06 01:14:19 +00:00
1abd1a9f4b
Avoid cse load instructions unless they are known to be invariant loads.
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llvm-svn: 97747
2010-03-04 21:18:08 +00:00
36f8aabb2c
Look ahead a bit to determine if a physical register def that is not marked dead is really alive. This is necessary to catch a lot of common cse opportunities for targets like x86.
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llvm-svn: 97706
2010-03-04 01:33:55 +00:00
2922641a7e
Fix a logic error. An instruction that has a live physical register def cannot be CSE'ed, but it *can* be used to replace a common subexpression.
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llvm-svn: 97688
2010-03-03 23:59:08 +00:00
0abbb399c9
Re-apply r97667 but with a little bit of thought put into the patch. This implements a special DenseMapInfo trait for DenseMap<MachineInstr*> that compare the value of the MachineInstr rather than the pointer value. Since the hashing and equality test functions ignore defs it's useful for doing CSE kind optimization.
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llvm-svn: 97678
2010-03-03 23:27:36 +00:00
a791914e2c
Revert 97667. It broke a bunch of tests.
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llvm-svn: 97673
2010-03-03 22:40:03 +00:00
0dd0c47b7e
Move DenseMapInfo for MachineInstr* to MachineInstr.h
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llvm-svn: 97667
2010-03-03 21:47:16 +00:00
b386cd3871
Machine CSE work in progress. It's doing some CSE now. But implicit def of physical registers are getting in the way.
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llvm-svn: 97664
2010-03-03 21:20:05 +00:00
4eab008b5a
Work in progress. Finding some cse now.
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llvm-svn: 97635
2010-03-03 02:48:20 +00:00
10194a425c
Fix typo.
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llvm-svn: 97577
2010-03-02 19:02:27 +00:00
036aa49d2e
Add skeleton of a machine level cse pass.
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llvm-svn: 97543
2010-03-02 02:38:24 +00:00
Evan Cheng