Craig Topper
|
9bd6241106
|
[X86] Remove the Fv packed logical operation alias instructions. Replace them with patterns to the regular instructions.
This enables execution domain fixing which is why the tests changed.
llvm-svn: 278090
|
2016-08-09 03:06:33 +00:00 |
|
Sanjay Patel
|
b114fd65fc
|
[x86] enable bitcasted fabs/fneg transforms
The vector cases don't change because we already have folds in X86ISelLowering
to look through and remove bitcasts.
llvm-svn: 272427
|
2016-06-10 20:33:50 +00:00 |
|
Sanjay Patel
|
13d57b94bb
|
[x86] add tests to show current codegen for obscured fneg/fabs
llvm-svn: 268533
|
2016-05-04 19:06:03 +00:00 |
|
Sanjay Patel
|
309c4f93e5
|
[x86] replace integer logic ops with packed SSE FP logic ops
If we have an operand to a bitwise logic op that's already in
an XMM register and the result is going to be sent to an XMM
register, then use an SSE logic op to avoid moves between the
integer and vector register files.
Related commits:
http://reviews.llvm.org/rL248395
http://reviews.llvm.org/rL248399
http://reviews.llvm.org/rL248404
http://reviews.llvm.org/rL248409
http://reviews.llvm.org/rL248415
This should solve PR22428:
https://llvm.org/bugs/show_bug.cgi?id=22428
llvm-svn: 251378
|
2015-10-27 01:28:07 +00:00 |
|
Sanjay Patel
|
28d1598e5b
|
add FP logic test cases to show current codegen (PR22428)
llvm-svn: 251370
|
2015-10-26 23:52:42 +00:00 |
|
Sanjay Patel
|
1a6534661b
|
[x86] replace integer 'xor' ops with packed SSE FP 'xor' ops when operating on FP scalars
Turn this:
movd %xmm0, %eax
movd %xmm1, %ecx
xorl %eax, %ecx
movd %ecx, %xmm0
into this:
xorps %xmm1, %xmm0
This is related to, but does not solve:
https://llvm.org/bugs/show_bug.cgi?id=22428
This is an extension of:
http://reviews.llvm.org/rL248395
llvm-svn: 248415
|
2015-09-23 18:33:42 +00:00 |
|
Sanjay Patel
|
aba37553c4
|
[x86] replace integer 'or' ops with packed SSE FP 'or' ops when operating on FP scalars
Turn this:
movd %xmm0, %eax
movd %xmm1, %ecx
orl %eax, %ecx
movd %ecx, %xmm0
into this:
orps %xmm1, %xmm0
This is related to, but does not solve:
https://llvm.org/bugs/show_bug.cgi?id=22428
This is an extension of:
http://reviews.llvm.org/rL248395
llvm-svn: 248409
|
2015-09-23 18:19:07 +00:00 |
|
Sanjay Patel
|
df2495f331
|
[x86] replace integer 'and' ops with packed SSE FP 'and' ops when operating on FP scalars
Turn this:
movd %xmm0, %eax
movd %xmm1, %ecx
andl %eax, %ecx
movd %ecx, %xmm0
into this:
andps %xmm1, %xmm0
This is related to, but does not solve:
https://llvm.org/bugs/show_bug.cgi?id=22428
Differential Revision: http://reviews.llvm.org/D13065
llvm-svn: 248395
|
2015-09-23 17:00:06 +00:00 |
|
Sanjay Patel
|
bab5d6c636
|
add test file ahead of any functional changes for PR22428
llvm-svn: 248123
|
2015-09-20 15:58:00 +00:00 |