Commit Graph

13 Commits

Author SHA1 Message Date
Simon Pilgrim 04b99fcded [X86][AVX] Updated fptosi_2f64_to_4i32 test to show missed opportunity to implicit zero the upper elements
llvm-svn: 279521
2016-08-23 15:10:39 +00:00
Simon Pilgrim 22c415a696 [X86][AVX] Add v2i32 fp to int conversion tests
llvm-svn: 279520
2016-08-23 15:00:52 +00:00
Simon Pilgrim cb96142fb8 [X86][AVX] Add AVX2/AVX512 fp to int conversion tests
llvm-svn: 279518
2016-08-23 14:37:35 +00:00
Simon Pilgrim 2279e59573 [X86][SSE] Avoid specifying unused arguments in SHUFPD lowering
As discussed on PR26491, we are missing the opportunity to make use of the smaller MOVHLPS instruction because we set both arguments of a SHUFPD when using it to lower a single input shuffle.

This patch sets the lowered argument to UNDEF if that shuffle element is undefined. This in turn makes it easier for target shuffle combining to decode UNDEF shuffle elements, allowing combines to MOVHLPS to occur.

A fix to match against MOVHPD stores was necessary as well.

This builds on the improved MOVLHPS/MOVHLPS lowering and memory folding support added in D16956

Adding similar support for SHUFPS will have to wait until have better support for target combining of binary shuffles.

Differential Revision: https://reviews.llvm.org/D23027

llvm-svn: 279430
2016-08-22 12:56:54 +00:00
Matthias Braun 152e7c8b12 VirtRegMap: Replace some identity copies with KILL instructions.
An identity COPY like this:
   %AL = COPY %AL, %EAX<imp-def>
has no semantic effect, but encodes liveness information: Further users
of %EAX only depend on this instruction even though it does not define
the full register.

Replace the COPY with a KILL instruction in those cases to maintain this
liveness information. (This reverts a small part of r238588 but this
time adds a comment explaining why a KILL instruction is useful).

llvm-svn: 274952
2016-07-09 00:19:07 +00:00
Simon Pilgrim 8c81678dfa [X86][SSE] Added additional fp/int tests.
Demonstrates some shortfalls in subvector(cvt(x)) compared to cvt(subvector(x)) patterns - especially on AVX/AVX2 targets.

llvm-svn: 242614
2015-07-18 17:05:39 +00:00
Simon Pilgrim c77f72c4e4 Refreshed tests.
llvm-svn: 242613
2015-07-18 16:53:51 +00:00
Simon Pilgrim 27e130f11c Tidyup shufflevector calls - don't repeat inputs if you can avoid it.
llvm-svn: 242609
2015-07-18 15:56:33 +00:00
Simon Pilgrim 88cfb3a748 [X86][SSE] Updated vector conversion test names.
I'll be adding further tests shortly so need a more thorough naming convention.

llvm-svn: 242440
2015-07-16 21:00:57 +00:00
Simon Pilgrim c36cfe7af0 [X86] Added 32-bit builds to fp<->int tests.
Ensure that i686 x87/SSE/SSE2 targets all build.

llvm-svn: 241368
2015-07-03 20:07:57 +00:00
Matthias Braun 165d467125 MachineCopyPropagation: Remove the copies instead of using KILL instructions.
For some history here see the commit messages of r199797 and r169060.

The original intent was to fix cases like:

%EAX<def> = COPY %ECX<kill>, %RAX<imp-def>
%RCX<def> = COPY %RAX<kill>

where simply removing the copies would have RCX undefined as in terms of
machine operands only the ECX part of it is defined. The machine
verifier would complain about this so 169060 changed such COPY
instructions into KILL instructions so some super-register imp-defs
would be preserved. In r199797 it was finally decided to always do this
regardless of super-register defs.

But this is wrong, consider:
R1 = COPY R0
...
R0 = COPY R1
getting changed to:
R1 = KILL R0
...
R0 = KILL R1

It now looks like R0 dies at the first KILL and won't be alive until the
second KILL, while in reality R0 is alive and must not change in this
part of the program.

As this only happens after register allocation there is not much code
still performing liveness queries so the issue was not noticed.  In fact
I didn't manage to create a testcase for this, without unrelated changes
I am working on at the moment.

The fix is simple: As of r223896 the MachineVerifier allows reads from
partially defined registers, so the whole transforming COPY->KILL thing
is not necessary anymore. This patch also changes a similar (but more
benign case as the def and src are the same register) case in the
VirtRegRewriter.

Differential Revision: http://reviews.llvm.org/D10117

llvm-svn: 238588
2015-05-29 18:19:25 +00:00
Simon Pilgrim 017ca19384 [DAGCombiner] Enabled vector float/double -> int constant folding
llvm-svn: 236387
2015-05-02 13:04:07 +00:00
Simon Pilgrim 6e3b7bad11 [SSE] Added vector float/double -> i32 and i64 conversion tests
llvm-svn: 236384
2015-05-02 11:18:47 +00:00