forked from OSchip/llvm-project
312 lines
14 KiB
C++
312 lines
14 KiB
C++
// RUN: %clang_cc1 %s -emit-llvm -o - -triple=x86_64-apple-darwin10 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-NOCOMPAT
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// RUN: %clang_cc1 %s -emit-llvm -o - -triple=x86_64-apple-darwin10 -fclang-abi-compat=6.0 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-V6COMPAT
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// RUN: %clang_cc1 %s -emit-llvm -o - -triple=x86_64-scei-ps4 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-V6COMPAT
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extern int int_source();
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extern void int_sink(int x);
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namespace test0 {
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struct A {
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int aField;
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int bField;
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};
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struct B {
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int onebit : 2;
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int twobit : 6;
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int intField;
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};
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struct __attribute__((packed, aligned(2))) C : A, B {
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};
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// These accesses should have alignment 4 because they're at offset 0
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// in a reference with an assumed alignment of 4.
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// CHECK-LABEL: @_ZN5test01aERNS_1BE
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void a(B &b) {
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// CHECK: [[CALL:%.*]] = call i32 @_Z10int_sourcev()
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// CHECK: [[B_P:%.*]] = load [[B:%.*]]*, [[B]]**
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// CHECK: [[FIELD_P:%.*]] = bitcast [[B]]* [[B_P]] to i8*
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// CHECK: [[TRUNC:%.*]] = trunc i32 [[CALL]] to i8
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// CHECK: [[OLD_VALUE:%.*]] = load i8, i8* [[FIELD_P]], align 4
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// CHECK: [[T0:%.*]] = and i8 [[TRUNC]], 3
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// CHECK: [[T1:%.*]] = and i8 [[OLD_VALUE]], -4
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// CHECK: [[T2:%.*]] = or i8 [[T1]], [[T0]]
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// CHECK: store i8 [[T2]], i8* [[FIELD_P]], align 4
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b.onebit = int_source();
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// CHECK: [[B_P:%.*]] = load [[B]]*, [[B]]**
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// CHECK: [[FIELD_P:%.*]] = bitcast [[B]]* [[B_P]] to i8*
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// CHECK: [[VALUE:%.*]] = load i8, i8* [[FIELD_P]], align 4
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// CHECK: [[T0:%.*]] = shl i8 [[VALUE]], 6
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// CHECK: [[T1:%.*]] = ashr i8 [[T0]], 6
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// CHECK: [[T2:%.*]] = sext i8 [[T1]] to i32
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// CHECK: call void @_Z8int_sinki(i32 [[T2]])
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int_sink(b.onebit);
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}
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// These accesses should have alignment 2 because they're at offset 8
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// in a reference/pointer with an assumed alignment of 2.
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// CHECK-LABEL: @_ZN5test01bERNS_1CE
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void b(C &c) {
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// CHECK: [[CALL:%.*]] = call i32 @_Z10int_sourcev()
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// CHECK: [[C_P:%.*]] = load [[C:%.*]]*, [[C]]**
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// CHECK: [[T0:%.*]] = bitcast [[C]]* [[C_P]] to i8*
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// CHECK: [[T1:%.*]] = getelementptr inbounds i8, i8* [[T0]], i64 8
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// CHECK: [[B_P:%.*]] = bitcast i8* [[T1]] to [[B]]*
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// CHECK: [[FIELD_P:%.*]] = bitcast [[B]]* [[B_P]] to i8*
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// CHECK: [[TRUNC:%.*]] = trunc i32 [[CALL]] to i8
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// CHECK-V6COMPAT: [[OLD_VALUE:%.*]] = load i8, i8* [[FIELD_P]], align 2
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// CHECK-NOCOMPAT: [[OLD_VALUE:%.*]] = load i8, i8* [[FIELD_P]], align 4
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// CHECK: [[T0:%.*]] = and i8 [[TRUNC]], 3
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// CHECK: [[T1:%.*]] = and i8 [[OLD_VALUE]], -4
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// CHECK: [[T2:%.*]] = or i8 [[T1]], [[T0]]
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// CHECK-V6COMPAT: store i8 [[T2]], i8* [[FIELD_P]], align 2
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// CHECK-NOCOMPAT: store i8 [[T2]], i8* [[FIELD_P]], align 4
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c.onebit = int_source();
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// CHECK: [[C_P:%.*]] = load [[C]]*, [[C]]**
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// CHECK: [[T0:%.*]] = bitcast [[C]]* [[C_P]] to i8*
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// CHECK: [[T1:%.*]] = getelementptr inbounds i8, i8* [[T0]], i64 8
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// CHECK: [[B_P:%.*]] = bitcast i8* [[T1]] to [[B]]*
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// CHECK: [[FIELD_P:%.*]] = bitcast [[B]]* [[B_P]] to i8*
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// CHECK-V6COMPAT: [[VALUE:%.*]] = load i8, i8* [[FIELD_P]], align 2
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// CHECK-NOCOMPAT: [[VALUE:%.*]] = load i8, i8* [[FIELD_P]], align 4
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// CHECK: [[T0:%.*]] = shl i8 [[VALUE]], 6
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// CHECK: [[T1:%.*]] = ashr i8 [[T0]], 6
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// CHECK: [[T2:%.*]] = sext i8 [[T1]] to i32
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// CHECK: call void @_Z8int_sinki(i32 [[T2]])
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int_sink(c.onebit);
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}
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// CHECK-LABEL: @_ZN5test01cEPNS_1CE
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void c(C *c) {
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// CHECK: [[CALL:%.*]] = call i32 @_Z10int_sourcev()
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// CHECK: [[C_P:%.*]] = load [[C]]*, [[C]]**
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// CHECK: [[T0:%.*]] = bitcast [[C]]* [[C_P]] to i8*
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// CHECK: [[T1:%.*]] = getelementptr inbounds i8, i8* [[T0]], i64 8
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// CHECK: [[B_P:%.*]] = bitcast i8* [[T1]] to [[B]]*
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// CHECK: [[FIELD_P:%.*]] = bitcast [[B]]* [[B_P]] to i8*
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// CHECK: [[TRUNC:%.*]] = trunc i32 [[CALL]] to i8
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// CHECK-V6COMPAT: [[OLD_VALUE:%.*]] = load i8, i8* [[FIELD_P]], align 2
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// CHECK-NOCOMPAT: [[OLD_VALUE:%.*]] = load i8, i8* [[FIELD_P]], align 4
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// CHECK: [[T0:%.*]] = and i8 [[TRUNC]], 3
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// CHECK: [[T1:%.*]] = and i8 [[OLD_VALUE]], -4
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// CHECK: [[T2:%.*]] = or i8 [[T1]], [[T0]]
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// CHECK-V6COMPAT: store i8 [[T2]], i8* [[FIELD_P]], align 2
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// CHECK-NOCOMPAT: store i8 [[T2]], i8* [[FIELD_P]], align 4
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c->onebit = int_source();
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// CHECK: [[C_P:%.*]] = load [[C:%.*]]*, [[C]]**
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// CHECK: [[T0:%.*]] = bitcast [[C]]* [[C_P]] to i8*
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// CHECK: [[T1:%.*]] = getelementptr inbounds i8, i8* [[T0]], i64 8
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// CHECK: [[B_P:%.*]] = bitcast i8* [[T1]] to [[B:%.*]]*
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// CHECK: [[FIELD_P:%.*]] = bitcast [[B]]* [[B_P]] to i8*
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// CHECK-V6COMPAT: [[VALUE:%.*]] = load i8, i8* [[FIELD_P]], align 2
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// CHECK-NOCOMPAT: [[VALUE:%.*]] = load i8, i8* [[FIELD_P]], align 4
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// CHECK: [[T0:%.*]] = shl i8 [[VALUE]], 6
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// CHECK: [[T1:%.*]] = ashr i8 [[T0]], 6
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// CHECK: [[T2:%.*]] = sext i8 [[T1]] to i32
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// CHECK: call void @_Z8int_sinki(i32 [[T2]])
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int_sink(c->onebit);
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}
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// These accesses should have alignment 2 because they're at offset 8
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// in an alignment-2 variable.
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// CHECK-LABEL: @_ZN5test01dEv
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void d() {
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// CHECK-V6COMPAT: [[C_P:%.*]] = alloca [[C:%.*]], align 2
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// CHECK-NOCOMPAT: [[C_P:%.*]] = alloca [[C:%.*]], align 4
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C c;
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// CHECK: [[CALL:%.*]] = call i32 @_Z10int_sourcev()
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// CHECK: [[T0:%.*]] = bitcast [[C]]* [[C_P]] to i8*
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// CHECK: [[T1:%.*]] = getelementptr inbounds i8, i8* [[T0]], i64 8
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// CHECK: [[B_P:%.*]] = bitcast i8* [[T1]] to [[B]]*
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// CHECK: [[FIELD_P:%.*]] = bitcast [[B]]* [[B_P]] to i8*
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// CHECK: [[TRUNC:%.*]] = trunc i32 [[CALL]] to i8
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// CHECK-V6COMPAT: [[OLD_VALUE:%.*]] = load i8, i8* [[FIELD_P]], align 2
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// CHECK-NOCOMPAT: [[OLD_VALUE:%.*]] = load i8, i8* [[FIELD_P]], align 4
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// CHECK: [[T0:%.*]] = and i8 [[TRUNC]], 3
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// CHECK: [[T1:%.*]] = and i8 [[OLD_VALUE]], -4
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// CHECK: [[T2:%.*]] = or i8 [[T1]], [[T0]]
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// CHECK-V6COMPAT: store i8 [[T2]], i8* [[FIELD_P]], align 2
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// CHECK-NOCOMPAT: store i8 [[T2]], i8* [[FIELD_P]], align 4
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c.onebit = int_source();
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// CHECK: [[T0:%.*]] = bitcast [[C]]* [[C_P]] to i8*
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// CHECK: [[T1:%.*]] = getelementptr inbounds i8, i8* [[T0]], i64 8
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// CHECK: [[B_P:%.*]] = bitcast i8* [[T1]] to [[B:%.*]]*
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// CHECK: [[FIELD_P:%.*]] = bitcast [[B]]* [[B_P]] to i8*
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// CHECK-V6COMPAT: [[VALUE:%.*]] = load i8, i8* [[FIELD_P]], align 2
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// CHECK-NOCOMPAT: [[VALUE:%.*]] = load i8, i8* [[FIELD_P]], align 4
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// CHECK: [[T0:%.*]] = shl i8 [[VALUE]], 6
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// CHECK: [[T1:%.*]] = ashr i8 [[T0]], 6
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// CHECK: [[T2:%.*]] = sext i8 [[T1]] to i32
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// CHECK: call void @_Z8int_sinki(i32 [[T2]])
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int_sink(c.onebit);
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}
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// These accesses should have alignment 8 because they're at offset 8
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// in an alignment-16 variable.
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// CHECK-LABEL: @_ZN5test01eEv
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void e() {
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// CHECK: [[C_P:%.*]] = alloca [[C:%.*]], align 16
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__attribute__((aligned(16))) C c;
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// CHECK: [[CALL:%.*]] = call i32 @_Z10int_sourcev()
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// CHECK: [[T0:%.*]] = bitcast [[C]]* [[C_P]] to i8*
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// CHECK: [[T1:%.*]] = getelementptr inbounds i8, i8* [[T0]], i64 8
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// CHECK: [[B_P:%.*]] = bitcast i8* [[T1]] to [[B]]*
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// CHECK: [[FIELD_P:%.*]] = bitcast [[B]]* [[B_P]] to i8*
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// CHECK: [[TRUNC:%.*]] = trunc i32 [[CALL]] to i8
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// CHECK: [[OLD_VALUE:%.*]] = load i8, i8* [[FIELD_P]], align 8
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// CHECK: [[T0:%.*]] = and i8 [[TRUNC]], 3
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// CHECK: [[T1:%.*]] = and i8 [[OLD_VALUE]], -4
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// CHECK: [[T2:%.*]] = or i8 [[T1]], [[T0]]
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// CHECK: store i8 [[T2]], i8* [[FIELD_P]], align 8
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c.onebit = int_source();
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// CHECK: [[T0:%.*]] = bitcast [[C]]* [[C_P]] to i8*
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// CHECK: [[T1:%.*]] = getelementptr inbounds i8, i8* [[T0]], i64 8
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// CHECK: [[B_P:%.*]] = bitcast i8* [[T1]] to [[B:%.*]]*
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// CHECK: [[FIELD_P:%.*]] = bitcast [[B]]* [[B_P]] to i8*
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// CHECK: [[VALUE:%.*]] = load i8, i8* [[FIELD_P]], align 8
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// CHECK: [[T0:%.*]] = shl i8 [[VALUE]], 6
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// CHECK: [[T1:%.*]] = ashr i8 [[T0]], 6
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// CHECK: [[T2:%.*]] = sext i8 [[T1]] to i32
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// CHECK: call void @_Z8int_sinki(i32 [[T2]])
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int_sink(c.onebit);
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}
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}
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namespace test1 {
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struct Array {
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int elts[4];
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};
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struct A {
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__attribute__((aligned(16))) Array aArray;
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};
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struct B : virtual A {
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void *bPointer; // puts bArray at offset 16
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Array bArray;
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};
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struct C : virtual A { // must be viable as primary base
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// Non-empty, nv-size not a multiple of 16.
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void *cPointer1;
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void *cPointer2;
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};
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// Proof of concept that the non-virtual components of B do not have
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// to be 16-byte-aligned.
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struct D : C, B {};
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// For the following tests, we want to assign into a variable whose
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// alignment is high enough that it will absolutely not be the
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// constraint on the memcpy alignment.
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typedef __attribute__((aligned(64))) Array AlignedArray;
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// CHECK-LABEL: @_ZN5test11aERNS_1AE
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void a(A &a) {
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// CHECK: [[RESULT:%.*]] = alloca [[ARRAY:%.*]], align 64
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// CHECK: [[A_P:%.*]] = load [[A:%.*]]*, [[A]]**
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// CHECK: [[ARRAY_P:%.*]] = getelementptr inbounds [[A]], [[A]]* [[A_P]], i32 0, i32 0
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// CHECK: [[T0:%.*]] = bitcast [[ARRAY]]* [[RESULT]] to i8*
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// CHECK: [[T1:%.*]] = bitcast [[ARRAY]]* [[ARRAY_P]] to i8*
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// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 64 [[T0]], i8* align 16 [[T1]], i64 16, i1 false)
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AlignedArray result = a.aArray;
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}
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// CHECK-LABEL: @_ZN5test11bERNS_1BE
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void b(B &b) {
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// CHECK: [[RESULT:%.*]] = alloca [[ARRAY]], align 64
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// CHECK: [[B_P:%.*]] = load [[B:%.*]]*, [[B]]**
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// CHECK: [[VPTR_P:%.*]] = bitcast [[B]]* [[B_P]] to i8**
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// CHECK: [[VPTR:%.*]] = load i8*, i8** [[VPTR_P]], align 8
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// CHECK: [[T0:%.*]] = getelementptr i8, i8* [[VPTR]], i64 -24
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// CHECK: [[OFFSET_P:%.*]] = bitcast i8* [[T0]] to i64*
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// CHECK: [[OFFSET:%.*]] = load i64, i64* [[OFFSET_P]], align 8
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// CHECK: [[T0:%.*]] = bitcast [[B]]* [[B_P]] to i8*
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// CHECK: [[T1:%.*]] = getelementptr inbounds i8, i8* [[T0]], i64 [[OFFSET]]
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// CHECK: [[A_P:%.*]] = bitcast i8* [[T1]] to [[A]]*
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// CHECK: [[ARRAY_P:%.*]] = getelementptr inbounds [[A]], [[A]]* [[A_P]], i32 0, i32 0
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// CHECK: [[T0:%.*]] = bitcast [[ARRAY]]* [[RESULT]] to i8*
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// CHECK: [[T1:%.*]] = bitcast [[ARRAY]]* [[ARRAY_P]] to i8*
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// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 64 [[T0]], i8* align 16 [[T1]], i64 16, i1 false)
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AlignedArray result = b.aArray;
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}
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// CHECK-LABEL: @_ZN5test11cERNS_1BE
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void c(B &b) {
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// CHECK: [[RESULT:%.*]] = alloca [[ARRAY]], align 64
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// CHECK: [[B_P:%.*]] = load [[B]]*, [[B]]**
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// CHECK: [[ARRAY_P:%.*]] = getelementptr inbounds [[B]], [[B]]* [[B_P]], i32 0, i32 2
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// CHECK: [[T0:%.*]] = bitcast [[ARRAY]]* [[RESULT]] to i8*
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// CHECK: [[T1:%.*]] = bitcast [[ARRAY]]* [[ARRAY_P]] to i8*
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// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 64 [[T0]], i8* align 8 [[T1]], i64 16, i1 false)
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AlignedArray result = b.bArray;
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}
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// CHECK-LABEL: @_ZN5test11dEPNS_1BE
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void d(B *b) {
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// CHECK: [[RESULT:%.*]] = alloca [[ARRAY]], align 64
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// CHECK: [[B_P:%.*]] = load [[B]]*, [[B]]**
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// CHECK: [[ARRAY_P:%.*]] = getelementptr inbounds [[B]], [[B]]* [[B_P]], i32 0, i32 2
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// CHECK: [[T0:%.*]] = bitcast [[ARRAY]]* [[RESULT]] to i8*
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// CHECK: [[T1:%.*]] = bitcast [[ARRAY]]* [[ARRAY_P]] to i8*
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// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 64 [[T0]], i8* align 8 [[T1]], i64 16, i1 false)
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AlignedArray result = b->bArray;
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}
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// CHECK-LABEL: @_ZN5test11eEv
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void e() {
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// CHECK: [[B_P:%.*]] = alloca [[B]], align 16
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// CHECK: [[RESULT:%.*]] = alloca [[ARRAY]], align 64
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// CHECK: [[ARRAY_P:%.*]] = getelementptr inbounds [[B]], [[B]]* [[B_P]], i32 0, i32 2
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// CHECK: [[T0:%.*]] = bitcast [[ARRAY]]* [[RESULT]] to i8*
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// CHECK: [[T1:%.*]] = bitcast [[ARRAY]]* [[ARRAY_P]] to i8*
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// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 64 [[T0]], i8* align 16 [[T1]], i64 16, i1 false)
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B b;
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AlignedArray result = b.bArray;
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}
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// CHECK-LABEL: @_ZN5test11fEv
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void f() {
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// TODO: we should devirtualize this derived-to-base conversion.
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// CHECK: [[D_P:%.*]] = alloca [[D:%.*]], align 16
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// CHECK: [[RESULT:%.*]] = alloca [[ARRAY]], align 64
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// CHECK: [[VPTR_P:%.*]] = bitcast [[D]]* [[D_P]] to i8**
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// CHECK: [[VPTR:%.*]] = load i8*, i8** [[VPTR_P]], align 16
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// CHECK: [[T0:%.*]] = getelementptr i8, i8* [[VPTR]], i64 -24
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// CHECK: [[OFFSET_P:%.*]] = bitcast i8* [[T0]] to i64*
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// CHECK: [[OFFSET:%.*]] = load i64, i64* [[OFFSET_P]], align 8
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// CHECK: [[T0:%.*]] = bitcast [[D]]* [[D_P]] to i8*
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// CHECK: [[T1:%.*]] = getelementptr inbounds i8, i8* [[T0]], i64 [[OFFSET]]
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// CHECK: [[A_P:%.*]] = bitcast i8* [[T1]] to [[A]]*
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// CHECK: [[ARRAY_P:%.*]] = getelementptr inbounds [[A]], [[A]]* [[A_P]], i32 0, i32 0
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// CHECK: [[T0:%.*]] = bitcast [[ARRAY]]* [[RESULT]] to i8*
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// CHECK: [[T1:%.*]] = bitcast [[ARRAY]]* [[ARRAY_P]] to i8*
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// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 64 [[T0]], i8* align 16 [[T1]], i64 16, i1 false)
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D d;
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AlignedArray result = d.aArray;
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}
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// CHECK-LABEL: @_ZN5test11gEv
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void g() {
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// CHECK: [[D_P:%.*]] = alloca [[D]], align 16
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// CHECK: [[RESULT:%.*]] = alloca [[ARRAY]], align 64
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// CHECK: [[T0:%.*]] = bitcast [[D]]* [[D_P]] to i8*
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// CHECK: [[T1:%.*]] = getelementptr inbounds i8, i8* [[T0]], i64 24
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// CHECK: [[B_P:%.*]] = bitcast i8* [[T1]] to [[B:%.*]]*
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// CHECK: [[ARRAY_P:%.*]] = getelementptr inbounds [[B]], [[B]]* [[B_P]], i32 0, i32 2
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// CHECK: [[T0:%.*]] = bitcast [[ARRAY]]* [[RESULT]] to i8*
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// CHECK: [[T1:%.*]] = bitcast [[ARRAY]]* [[ARRAY_P]] to i8*
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// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 64 [[T0]], i8* align 8 [[T1]], i64 16, i1 false)
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D d;
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AlignedArray result = d.bArray;
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}
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}
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