forked from OSchip/llvm-project
				
			
		
			
				
	
	
		
			56 lines
		
	
	
		
			2.4 KiB
		
	
	
	
		
			C++
		
	
	
	
			
		
		
	
	
			56 lines
		
	
	
		
			2.4 KiB
		
	
	
	
		
			C++
		
	
	
	
| // RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -emit-llvm --std=c++17 -fcxx-exceptions -fexceptions -discard-value-names %s -o - | FileCheck %s
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| 
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| struct Q { Q(); };
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| struct R { R(Q); ~R(); };
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| struct S { S(Q); ~S(); };
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| struct T : R, S {};
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| 
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| Q q;
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| T t { R{q}, S{q} };
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| 
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| // CHECK-LABEL: define internal void @__cxx_global_var_init.1() {{.*}} {
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| // CHECK-NEXT: [[TMP_R:%[a-z0-9.]+]] = alloca %struct.R, align 1
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| // CHECK-NEXT: [[TMP_Q1:%[a-z0-9.]+]] = alloca %struct.Q, align 1
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| // CHECK-NEXT: [[TMP_S:%[a-z0-9.]+]] = alloca %struct.S, align 1
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| // CHECK-NEXT: [[TMP_Q2:%[a-z0-9.]+]] = alloca %struct.Q, align 1
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| // CHECK-NEXT: [[XPT:%[a-z0-9.]+]] = alloca i8*
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| // CHECK-NEXT: [[SLOT:%[a-z0-9.]+]] = alloca i32
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| // CHECK-NEXT: [[ACTIVE:%[a-z0-9.]+]] = alloca i1, align 1
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| // CHECK-NEXT: call void @_ZN1RC1E1Q(%struct.R* [[TMP_R]])
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| // CHECK-NEXT: store i1 true, i1* [[ACTIVE]], align 1
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| // CHECK-NEXT: invoke void @_ZN1SC1E1Q(%struct.S* [[TMP_S]])
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| // CHECK-NEXT:   to label %[[L1:[a-z0-9.]+]] unwind label %[[L2:[a-z0-9.]+]]
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| // CHECK-EMPTY:
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| // CHECK-NEXT: [[L1]]:
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| // CHECK-NEXT: store i1 false, i1* [[ACTIVE]], align 1
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| // CHECK-NEXT: call void @_ZN1SD1Ev(%struct.S*
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| // CHECK-NEXT: call void @_ZN1RD1Ev(%struct.R*
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| // CHECK-NEXT: [[EXIT:%[a-z0-9.]+]] = call i32 @__cxa_atexit(
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| // CHECK-NEXT: ret void
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| // CHECK-EMPTY:
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| // CHECK-NEXT: [[L2]]:
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| // CHECK-NEXT: [[LP:%[a-z0-9.]+]] = landingpad { i8*, i32 }
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| // CHECK-NEXT:                      cleanup
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| // CHECK-NEXT: [[X1:%[a-z0-9.]+]] = extractvalue { i8*, i32 } [[LP]], 0
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| // CHECK-NEXT: store i8* [[X1]], i8** [[XPT]], align 8
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| // CHECK-NEXT: [[X2:%[a-z0-9.]+]] = extractvalue { i8*, i32 } [[LP]], 1
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| // CHECK-NEXT: store i32 [[X2]], i32* [[SLOT]], align 4
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| // CHECK-NEXT: [[IS_ACT:%[a-z0-9.]+]] = load i1, i1* [[ACTIVE]], align 1
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| // CHECK-NEXT: br i1 [[IS_ACT]], label %[[L3:[a-z0-9.]+]], label %[[L4:[a-z0-9.]+]]
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| // CHECK-EMPTY:
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| // CHECK-NEXT: [[L3]]:
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| // CHECK-NEXT: call void @_ZN1RD1Ev(%struct.R*
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| // CHECK-NEXT: br label %[[L4]]
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| // CHECK-EMPTY:
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| // CHECK-NEXT: [[L4]]:
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| // CHECK-NEXT: call void @_ZN1RD1Ev(%struct.R* [[TMP_R]])
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| // CHECK-NEXT: br label %[[L5:[a-z0-9.]+]]
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| // CHECK-EMPTY:
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| // CHECK-NEXT: [[L5]]:
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| // CHECK-NEXT: [[EXN:%[a-z0-9.]+]] = load i8*, i8** [[XPT]], align 8
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| // CHECK-NEXT: [[SEL:%[a-z0-9.]+]] = load i32, i32* [[SLOT]], align 4
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| // CHECK-NEXT: [[LV1:%[a-z0-9.]+]] = insertvalue { i8*, i32 } undef, i8* [[EXN]], 0
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| // CHECK-NEXT: [[LV2:%[a-z0-9.]+]] = insertvalue { i8*, i32 } [[LV1]], i32 [[SEL]], 1
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| // CHECK-NEXT: resume { i8*, i32 } [[LV2]]
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| // CHECK-NEXT: }
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