forked from OSchip/llvm-project
				
			
		
			
				
	
	
		
			341 lines
		
	
	
		
			17 KiB
		
	
	
	
		
			C++
		
	
	
	
			
		
		
	
	
			341 lines
		
	
	
		
			17 KiB
		
	
	
	
		
			C++
		
	
	
	
| // Test host codegen.
 | |
| // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64
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| // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
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| // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64
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| // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32
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| // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
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| // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32
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| 
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| // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s
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| // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
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| // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s
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| // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s
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| // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
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| // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s
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| // SIMD-ONLY0-NOT: {{__kmpc|__tgt}}
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| 
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| // Test target codegen - host bc file has to be created first.
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| // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc
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| // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-64
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| // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s
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| // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-64
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| // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc
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| // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-32
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| // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s
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| // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix TCHECK --check-prefix TCHECK-32
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| 
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| // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc
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| // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck --check-prefix SIMD-ONLY1 %s
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| // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s
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| // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY1 %s
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| // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc
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| // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck --check-prefix SIMD-ONLY1 %s
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| // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s
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| // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY1 %s
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| // SIMD-ONLY1-NOT: {{__kmpc|__tgt}}
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| 
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| // expected-no-diagnostics
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| #ifndef HEADER
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| #define HEADER
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| 
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| // CHECK-DAG: %struct.ident_t = type { i32, i32, i32, i32, i8* }
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| // CHECK-DAG: [[STR:@.+]] = private unnamed_addr constant [23 x i8] c";unknown;unknown;0;0;;\00"
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| // CHECK-DAG: [[DEF_LOC:@.+]] = private unnamed_addr global %struct.ident_t { i32 0, i32 2, i32 0, i32 0, i8* getelementptr inbounds ([23 x i8], [23 x i8]* [[STR]], i32 0, i32 0) }
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| 
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| // CHECK-DAG: [[S1:%.+]] = type { double }
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| // CHECK-DAG: [[ENTTY:%.+]] = type { i8*, i8*, i[[SZ:32|64]], i32, i32 }
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| 
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| // TCHECK: [[ENTTY:%.+]] = type { i8*, i8*, i{{32|64}}, i32, i32 }
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| 
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| // We have 6 target regions
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| 
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| // CHECK-DAG: @{{.*}} = weak constant i8 0
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| // CHECK-DAG: @{{.*}} = weak constant i8 0
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| // CHECK-DAG: @{{.*}} = weak constant i8 0
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| // CHECK-DAG: @{{.*}} = weak constant i8 0
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| // CHECK-DAG: @{{.*}} = weak constant i8 0
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| // CHECK-DAG: @{{.*}} = weak constant i8 0
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| 
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| // TCHECK: @{{.+}} = weak constant [[ENTTY]]
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| // TCHECK: @{{.+}} = weak constant [[ENTTY]]
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| // TCHECK: @{{.+}} = weak constant [[ENTTY]]
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| // TCHECK: @{{.+}} = weak constant [[ENTTY]]
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| // TCHECK: @{{.+}} = weak constant [[ENTTY]]
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| // TCHECK: @{{.+}} = weak constant [[ENTTY]]
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| 
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| // Check target registration is registered as a Ctor.
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| // CHECK: appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 0, void ()* @.omp_offloading.requires_reg, i8* null }]
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| 
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| 
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| template<typename tx>
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| tx ftemplate(int n) {
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|   tx a = 0;
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| 
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|   #pragma omp target parallel num_threads(tx(20))
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|   {
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|   }
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| 
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|   short b = 1;
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|   #pragma omp target parallel num_threads(b)
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|   {
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|     a += b;
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|   }
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| 
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|   return a;
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| }
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| 
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| static
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| int fstatic(int n) {
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| 
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|   #pragma omp target parallel num_threads(n)
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|   {
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|   }
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| 
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|   #pragma omp target parallel num_threads(32+n)
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|   {
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|   }
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| 
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|   return n+1;
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| }
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| 
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| struct S1 {
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|   double a;
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| 
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|   int r1(int n){
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|     int b = 1;
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| 
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|     #pragma omp target parallel num_threads(n-b)
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|     {
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|       this->a = (double)b + 1.5;
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|     }
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| 
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|     #pragma omp target parallel num_threads(1024)
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|     {
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|       this->a = 2.5;
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|     }
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| 
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|     return (int)a;
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|   }
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| };
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| 
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| // CHECK: define {{.*}}@{{.*}}bar{{.*}}
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| int bar(int n){
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|   int a = 0;
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| 
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|   S1 S;
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|   // CHECK: call {{.*}}i32 [[FS1:@.+]]([[S1]]* {{.*}}, i32 {{.*}})
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|   a += S.r1(n);
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| 
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|   // CHECK: call {{.*}}i32 [[FSTATIC:@.+]](i32 {{.*}})
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|   a += fstatic(n);
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| 
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|   // CHECK: call {{.*}}i32 [[FTEMPLATE:@.+]](i32 {{.*}})
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|   a += ftemplate<int>(n);
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| 
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|   return a;
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| }
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| 
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| 
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| 
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| //
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| // CHECK: define {{.*}}[[FS1]]([[S1]]* {{%.+}}, i32 {{[^%]*}}[[PARM:%.+]])
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| //
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| // CHECK-DAG:   store i32 [[PARM]], i32* [[N_ADDR:%.+]], align
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| // CHECK:       store i32 1, i32* [[B:%.+]], align
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| // CHECK:       [[NV:%.+]] = load i32, i32* [[N_ADDR]], align
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| // CHECK:       [[BV:%.+]] = load i32, i32* [[B]], align
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| // CHECK:       [[SUB:%.+]] = sub nsw i32 [[NV]], [[BV]]
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| // CHECK:       store i32 [[SUB]], i32* [[CAPE_ADDR:%.+]], align
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| // CHECK:       [[CEV:%.+]] = load i32, i32* [[CAPE_ADDR]], align
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| // CHECK-64:    [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPEC_ADDR:%.+]] to i32*
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| // CHECK-64:    store i32 [[CEV]], i32* [[CONV]], align
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| // CHECK-32:    store i32 [[CEV]], i32* [[CAPEC_ADDR:%.+]], align
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| // CHECK:       [[ARG:%.+]] = load i[[SZ]], i[[SZ]]* [[CAPEC_ADDR]], align
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| // CHECK:       [[THREADS:%.+]] = load i32, i32* [[CAPE_ADDR]], align
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| //
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| // CHECK-DAG:   [[RET:%.+]] = call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 4, {{.*}}, i32 1, i32 [[THREADS]])
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| // CHECK:       [[ERROR:%.+]] = icmp ne i32 [[RET]], 0
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| // CHECK:       br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]]
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| //
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| // CHECK:       [[FAIL]]
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| // CHECK:       call void [[HVT1:@.+]]([[S1]]* {{%.+}}, i[[SZ]] {{%.+}}, i[[SZ]] [[ARG]])
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| // CHECK:       br label {{%?}}[[END]]
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| // CHECK:       [[END]]
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| //
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| //
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| //
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| // CHECK-DAG:   [[RET:%.+]] = call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 2, {{.+}}, i32 1, i32 1024)
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| // CHECK:       [[ERROR:%.+]] = icmp ne i32 [[RET]], 0
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| // CHECK:       br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]]
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| //
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| // CHECK:       [[FAIL]]
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| // CHECK:       call void [[HVT2:@.+]]([[S1]]* {{[^,]+}})
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| // CHECK:       br label {{%?}}[[END]]
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| // CHECK:       [[END]]
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| //
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| 
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| 
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| 
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| 
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| 
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| 
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| //
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| // CHECK: define {{.*}}[[FSTATIC]](i32 {{[^%]*}}[[PARM:%.+]])
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| //
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| // CHECK-DAG:   store i32 [[PARM]], i32* [[N_ADDR:%.+]], align
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| // CHECK:       [[NV:%.+]] = load i32, i32* [[N_ADDR]], align
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| // CHECK:       store i32 [[NV]], i32* [[CAPE_ADDR:%.+]], align
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| // CHECK:       [[CEV:%.+]] = load i32, i32* [[CAPE_ADDR]], align
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| // CHECK-64:    [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPEC_ADDR:%.+]] to i32*
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| // CHECK-64:    store i32 [[CEV]], i32* [[CONV]], align
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| // CHECK-32:    store i32 [[CEV]], i32* [[CAPEC_ADDR:%.+]], align
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| // CHECK:       [[ARG:%.+]] = load i[[SZ]], i[[SZ]]* [[CAPEC_ADDR]], align
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| // CHECK:       [[THREADS:%.+]] = load i32, i32* [[CAPE_ADDR]], align
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| //
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| // CHECK-DAG:   [[RET:%.+]] = call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 1, {{.*}}, i32 1, i32 [[THREADS]])
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| // CHECK:       [[ERROR:%.+]] = icmp ne i32 [[RET]], 0
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| // CHECK:       br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]]
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| //
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| // CHECK:       [[FAIL]]
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| // CHECK:       call void [[HVT3:@.+]](i[[SZ]] [[ARG]])
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| // CHECK:       br label {{%?}}[[END]]
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| // CHECK:       [[END]]
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| //
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| //
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| //
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| // CHECK:       [[NV:%.+]] = load i32, i32* [[N_ADDR]], align
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| // CHECK:       [[ADD:%.+]] = add nsw i32 32, [[NV]]
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| // CHECK:       store i32 [[ADD]], i32* [[CAPE_ADDR:%.+]], align
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| // CHECK:       [[CEV:%.+]] = load i32, i32* [[CAPE_ADDR]], align
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| // CHECK-64:    [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPEC_ADDR:%.+]] to i32*
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| // CHECK-64:    store i32 [[CEV]], i32* [[CONV]], align
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| // CHECK-32:    store i32 [[CEV]], i32* [[CAPEC_ADDR:%.+]], align
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| // CHECK:       [[ARG:%.+]] = load i[[SZ]], i[[SZ]]* [[CAPEC_ADDR]], align
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| // CHECK:       [[THREADS:%.+]] = load i32, i32* [[CAPE_ADDR]], align
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| //
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| // CHECK-DAG:   [[RET:%.+]] = call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 1, {{.*}}, i32 1, i32 [[THREADS]])
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| // CHECK:       [[ERROR:%.+]] = icmp ne i32 [[RET]], 0
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| // CHECK:       br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]]
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| //
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| // CHECK:       [[FAIL]]
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| // CHECK:       call void [[HVT4:@.+]](i[[SZ]] [[ARG]])
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| // CHECK:       br label {{%?}}[[END]]
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| // CHECK:       [[END]]
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| //
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| 
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| 
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| 
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| 
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| 
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| 
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| //
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| // CHECK: define {{.*}}[[FTEMPLATE]]
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| //
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| // CHECK-DAG:   [[RET:%.+]] = call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 0, {{.*}}, i32 1, i32 20)
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| // CHECK-NEXT:  [[ERROR:%.+]] = icmp ne i32 [[RET]], 0
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| // CHECK-NEXT:  br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]]
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| //
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| // CHECK:       [[FAIL]]
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| // CHECK:       call void [[HVT5:@.+]]()
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| // CHECK:       br label {{%?}}[[END]]
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| //
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| // CHECK:       [[END]]
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| //
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| //
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| //
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| // CHECK:       store i16 1, i16* [[B:%.+]], align
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| // CHECK:       [[BV:%.+]] = load i16, i16* [[B]], align
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| // CHECK:       store i16 [[BV]], i16* [[CAPE_ADDR:%.+]], align
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| // CHECK:       [[CEV:%.+]] = load i16, i16* [[CAPE_ADDR]], align
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| // CHECK:       [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPEC_ADDR:%.+]] to i16*
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| // CHECK:       store i16 [[CEV]], i16* [[CONV]], align
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| // CHECK:       [[ARG:%.+]] = load i[[SZ]], i[[SZ]]* [[CAPEC_ADDR]], align
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| // CHECK:       [[T:%.+]] = load i16, i16* [[CAPE_ADDR]], align
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| // CHECK:       [[THREADS:%.+]] = zext i16 [[T]] to i32
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| //
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| // CHECK-DAG:   [[RET:%.+]] = call i32 @__tgt_target_teams(i64 -1, i8* @{{[^,]+}}, i32 3, {{.*}}, i32 1, i32 [[THREADS]])
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| // CHECK:       [[ERROR:%.+]] = icmp ne i32 [[RET]], 0
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| // CHECK:       br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]]
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| //
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| // CHECK:       [[FAIL]]
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| // CHECK:       call void [[HVT6:@.+]](i[[SZ]] {{%.+}}, i[[SZ]] {{%.+}}, i[[SZ]] [[ARG]])
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| // CHECK:       br label {{%?}}[[END]]
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| // CHECK:       [[END]]
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| //
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| 
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| 
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| 
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| 
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| 
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| 
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| // Check that the offloading functions are emitted and that the parallel function
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| // is appropriately guarded.
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| 
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| // CHECK:       define internal void [[HVT1]]([[S1]]* {{%.+}}, i[[SZ]] [[PARM1:%.+]], i[[SZ]] [[PARM2:%.+]])
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| // CHECK-DAG:   store i[[SZ]] [[PARM2]], i[[SZ]]* [[CAPE_ADDR:%.+]], align
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| // CHECK-64:    [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPE_ADDR]] to i32*
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| // CHECK-64:    [[NT:%.+]] = load i32, i32* [[CONV]], align
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| // CHECK-32:    [[NT:%.+]] = load i32, i32* [[CAPE_ADDR]], align
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| // CHECK:       call void @__kmpc_push_num_threads(%struct.ident_t* {{[^,]+}}, i32 {{[^,]+}}, i32 [[NT]])
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| // CHECK:       call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 2,
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| //
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| //
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| 
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| 
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| // CHECK:       define internal void [[HVT2]]([[S1]]* {{%.+}})
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| // CHECK:       call void @__kmpc_push_num_threads(%struct.ident_t* {{[^,]+}}, i32 {{[^,]+}}, i32 1024)
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| // CHECK:       call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 1,
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| //
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| //
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| 
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| 
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| 
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| 
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| 
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| 
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| 
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| 
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| // CHECK:       define internal void [[HVT3]](i[[SZ]] [[PARM:%.+]])
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| // CHECK-DAG:   store i[[SZ]] [[PARM]], i[[SZ]]* [[CAPE_ADDR:%.+]], align
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| // CHECK-64:    [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPE_ADDR]] to i32*
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| // CHECK-64:    [[NT:%.+]] = load i32, i32* [[CONV]], align
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| // CHECK-32:    [[NT:%.+]] = load i32, i32* [[CAPE_ADDR]], align
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| // CHECK:       call void @__kmpc_push_num_threads(%struct.ident_t* {{[^,]+}}, i32 {{[^,]+}}, i32 [[NT]])
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| // CHECK:       call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 0,
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| //
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| //
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| // CHECK:       define internal void [[HVT4]](i[[SZ]] [[PARM:%.+]])
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| // CHECK-DAG:   store i[[SZ]] [[PARM]], i[[SZ]]* [[CAPE_ADDR:%.+]], align
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| // CHECK-64:    [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPE_ADDR]] to i32*
 | |
| // CHECK-64:    [[NT:%.+]] = load i32, i32* [[CONV]], align
 | |
| // CHECK-32:    [[NT:%.+]] = load i32, i32* [[CAPE_ADDR]], align
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| // CHECK:       call void @__kmpc_push_num_threads(%struct.ident_t* {{[^,]+}}, i32 {{[^,]+}}, i32 [[NT]])
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| // CHECK:       call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 0,
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| //
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| //
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| 
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| 
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| 
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| 
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| 
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| // CHECK:       define internal void [[HVT5]](
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| // CHECK:       call void @__kmpc_push_num_threads(%struct.ident_t* {{[^,]+}}, i32 {{[^,]+}}, i32 20)
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| // CHECK:       call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 0,
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| //
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| //
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| 
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| 
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| // CHECK:       define internal void [[HVT6]](i[[SZ]] [[PARM1:%.+]], i[[SZ]] [[PARM2:%.+]], i[[SZ]] [[PARM3:%.+]])
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| // CHECK-DAG:   store i[[SZ]] [[PARM3]], i[[SZ]]* [[CAPE_ADDR:%.+]], align
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| // CHECK:       [[CONV:%.+]] = bitcast i[[SZ]]* [[CAPE_ADDR]] to i16*
 | |
| // CHECK:       [[T:%.+]] = load i16, i16* [[CONV]], align
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| // CHECK:       [[NT:%.+]] = sext i16 [[T]] to i32
 | |
| // CHECK:       call void @__kmpc_push_num_threads(%struct.ident_t* {{[^,]+}}, i32 {{[^,]+}}, i32 [[NT]])
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| // CHECK:       call {{.*}}void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* [[DEF_LOC]], i32 2,
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| //
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| //
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| 
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| 
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| 
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| #endif
 |