forked from OSchip/llvm-project
47 lines
1.1 KiB
LLVM
47 lines
1.1 KiB
LLVM
; RUN: llc -march=hexagon < %s | FileCheck %s
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; Check that we generate 'cmph.gtu' instruction.
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; CHECK-LABEL: @cmphgtu
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; CHECK: cmph.gtu
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@glob = common global i8 0, align 1
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define i32 @cmphgtu(i32 %a0, i32 %a1) #0 {
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b2:
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%v3 = xor i32 %a1, %a0
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%v4 = and i32 %v3, 65535
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%v5 = icmp ugt i32 %v4, 40
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br i1 %v5, label %b6, label %b8
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b6: ; preds = %b2
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%v7 = trunc i32 %a0 to i8
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store i8 %v7, i8* @glob, align 1
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br label %b8
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b8: ; preds = %b6, %b2
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%v9 = phi i32 [ 1, %b6 ], [ 0, %b2 ]
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ret i32 %v9
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}
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; With zxtb, we must not generate a cmph.gtu instruction.
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; CHECK-LABEL: @nocmphgtu
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; CHECK-NOT: cmph.gtu
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define i32 @nocmphgtu(i32 %a0, i32 %a1) #0 {
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b2:
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%v3 = xor i32 %a1, %a0
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%v4 = and i32 %v3, 255
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%v5 = icmp ugt i32 %v4, 40
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br i1 %v5, label %b6, label %b8
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b6: ; preds = %b2
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%v7 = trunc i32 %a0 to i8
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store i8 %v7, i8* @glob, align 1
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br label %b8
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b8: ; preds = %b6, %b2
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%v9 = phi i32 [ 1, %b6 ], [ 0, %b2 ]
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ret i32 %v9
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}
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attributes #0 = { nounwind }
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