forked from OSchip/llvm-project
25 lines
695 B
LLVM
25 lines
695 B
LLVM
; RUN: llc -march=hexagon < %s | FileCheck %s
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; CHECK: sfadd
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; CHECK: sfsub
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define void @f0(float* %a0, float %a1, float %a2) #0 {
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b0:
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%v0 = alloca float*, align 4
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%v1 = alloca float, align 4
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%v2 = alloca float, align 4
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store float* %a0, float** %v0, align 4
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store float %a1, float* %v1, align 4
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store float %a2, float* %v2, align 4
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%v3 = load float*, float** %v0, align 4
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%v4 = load float, float* %v3
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%v5 = load float, float* %v1, align 4
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%v6 = fadd float %v4, %v5
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%v7 = load float, float* %v2, align 4
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%v8 = fsub float %v6, %v7
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%v9 = load float*, float** %v0, align 4
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store float %v8, float* %v9
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ret void
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}
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attributes #0 = { nounwind "target-cpu"="hexagonv5" }
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