forked from OSchip/llvm-project
31 lines
783 B
LLVM
31 lines
783 B
LLVM
; RUN: llc -march=hexagon < %s
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; REQUIRES: asserts
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target triple = "hexagon"
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; Function Attrs: nounwind optsize readonly
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define void @f0() #0 align 2 {
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b0:
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%v0 = load i32, i32* undef, align 8
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%v1 = zext i32 %v0 to i64
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%v2 = add nuw nsw i64 %v1, 63
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%v3 = lshr i64 %v2, 6
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%v4 = trunc i64 %v3 to i32
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br i1 undef, label %b3, label %b1
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b1: ; preds = %b0
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%v5 = add nsw i32 %v4, -1
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br label %b2
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b2: ; preds = %b2, %b1
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%v6 = phi i32 [ %v5, %b1 ], [ %v7, %b2 ]
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%v7 = add i32 %v6, -1
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%v8 = icmp sgt i32 %v7, -1
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br i1 %v8, label %b2, label %b3
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b3: ; preds = %b2, %b0
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ret void
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}
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attributes #0 = { nounwind optsize readonly }
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