forked from OSchip/llvm-project
22 lines
592 B
LLVM
22 lines
592 B
LLVM
; RUN: llc -march=hexagon < %s
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; REQUIRES: asserts
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; Test that we do not ICE with a cannot select message when
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; generating a v16i32 constant pool node.
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; Function Attrs: nounwind
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define void @f0() #0 {
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b0:
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br i1 undef, label %b1, label %b2
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b1: ; preds = %b1, %b0
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%v0 = phi i32 [ 0, %b1 ], [ 0, %b0 ]
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store <16 x i32> zeroinitializer, <16 x i32>* null, align 64
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br i1 false, label %b1, label %b2
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b2: ; preds = %b1, %b0
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ret void
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}
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attributes #0 = { nounwind "target-cpu"="hexagonv60" }
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