forked from OSchip/llvm-project
63 lines
1.7 KiB
LLVM
63 lines
1.7 KiB
LLVM
; RUN: llc < %s | FileCheck %s
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target datalayout = "e-m:e-p:16:16-i32:16-i64:16-f32:16-f64:16-a:8-n8:16-S16"
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target triple = "msp430-generic-generic"
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@llvm.used = appending global [1 x i8*] [i8* bitcast (void ()* @ISR to i8*)], section "llvm.metadata"
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; MSP430 EABI p. 3.9
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; Interrupt functions must save all the registers that are used, even those
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; that are normally considered callee-saved.
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; To return from an interrupt function, the function must execute the special
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; instruction RETI, which restores the SR register and branches to the PC where
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; the interrupt occurred.
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; CHECK: .section __interrupt_vector_2,"ax",@progbits
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; CHECK-NEXT: .short ISR
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@g = global float 0.0
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define msp430_intrcc void @ISR() #0 {
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entry:
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; CHECK-LABEL: ISR:
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; CHECK: push r15
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; CHECK: push r14
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; CHECK: push r13
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; CHECK: push r12
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; CHECK: push r11
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; CHECK: push r10
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; CHECK: push r9
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; CHECK: push r8
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; CHECK: push r7
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; CHECK: push r6
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; CHECK: push r5
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; CHECK: push r4
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%t1 = load volatile float, float* @g
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%t2 = load volatile float, float* @g
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%t3 = load volatile float, float* @g
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%t4 = load volatile float, float* @g
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%t5 = load volatile float, float* @g
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%t6 = load volatile float, float* @g
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%t7 = load volatile float, float* @g
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store volatile float %t1, float* @g
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store volatile float %t2, float* @g
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store volatile float %t3, float* @g
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store volatile float %t4, float* @g
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store volatile float %t5, float* @g
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store volatile float %t6, float* @g
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; CHECK: reti
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ret void
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}
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; Functions without 'interrupt' attribute don't get a vector section.
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; CHECK-NOT: __interrupt_vector
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; CHECK-LABEL: NMI:
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; CHECK: reti
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define msp430_intrcc void @NMI() #1 {
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ret void
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}
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attributes #0 = { noinline nounwind optnone "interrupt"="2" }
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attributes #1 = { noinline nounwind optnone }
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