forked from OSchip/llvm-project
47 lines
1.2 KiB
LLVM
47 lines
1.2 KiB
LLVM
; RUN: llc -march=mipsel -mcpu=mips32r2 -mattr=+micromips \
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; RUN: -relocation-model=pic -O3 < %s | FileCheck %s
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; RUN: llc -march=mipsel -mcpu=mips32r6 -mattr=+micromips \
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; RUN: -relocation-model=pic -O3 < %s | FileCheck %s
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@a = global i32 10, align 4
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@b = global i32 0, align 4
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@c = global i32 10, align 4
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@d = global i32 0, align 4
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define i32 @shift_left() nounwind {
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entry:
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%0 = load i32, i32* @a, align 4
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%shl = shl i32 %0, 4
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store i32 %shl, i32* @b, align 4
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%1 = load i32, i32* @c, align 4
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%shl1 = shl i32 %1, 10
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store i32 %shl1, i32* @d, align 4
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ret i32 0
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}
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; CHECK: sll16 ${{[2-7]|16|17}}, ${{[2-7]|16|17}}, {{[0-7]}}
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; CHECK: sll ${{[0-9]+}}, ${{[0-9]+}}, {{[0-9]+}}
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@i = global i32 10654, align 4
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@j = global i32 0, align 4
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@m = global i32 10, align 4
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@n = global i32 0, align 4
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define i32 @shift_right() nounwind {
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entry:
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%0 = load i32, i32* @i, align 4
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%shr = lshr i32 %0, 4
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store i32 %shr, i32* @j, align 4
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%1 = load i32, i32* @m, align 4
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%shr1 = lshr i32 %1, 10
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store i32 %shr1, i32* @n, align 4
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ret i32 0
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}
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; CHECK: srl16 ${{[2-7]|16|17}}, ${{[2-7]|16|17}}, {{[0-7]}}
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; CHECK: srl ${{[0-9]+}}, ${{[0-9]+}}, {{[0-9]+}}
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