forked from OSchip/llvm-project
252 lines
7.4 KiB
LLVM
252 lines
7.4 KiB
LLVM
; RUN: llc < %s -march=sparc -mattr=hard-quad-float | FileCheck %s --check-prefix=CHECK --check-prefix=HARD --check-prefix=BE
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; RUN: llc < %s -march=sparcel -mattr=hard-quad-float | FileCheck %s --check-prefix=CHECK --check-prefix=HARD --check-prefix=EL
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; RUN: llc < %s -march=sparc -mattr=-hard-quad-float -verify-machineinstrs | FileCheck %s --check-prefix=CHECK --check-prefix=SOFT --check-prefix=BE
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; RUN: llc < %s -march=sparcel -mattr=-hard-quad-float | FileCheck %s --check-prefix=CHECK --check-prefix=SOFT --check-prefix=EL
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; CHECK-LABEL: f128_ops:
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; CHECK: ldd
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; CHECK: ldd
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; CHECK: ldd
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; CHECK: ldd
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; HARD: faddq [[R0:.+]], [[R1:.+]], [[R2:.+]]
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; HARD: fsubq [[R2]], [[R3:.+]], [[R4:.+]]
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; HARD: fmulq [[R4]], [[R5:.+]], [[R6:.+]]
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; HARD: fdivq [[R6]], [[R2]]
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; SOFT: call _Q_add
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; SOFT: unimp 16
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; SOFT: call _Q_sub
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; SOFT: unimp 16
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; SOFT: call _Q_mul
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; SOFT: unimp 16
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; SOFT: call _Q_div
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; SOFT: unimp 16
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; CHECK: std
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; CHECK: std
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define void @f128_ops(fp128* noalias sret %scalar.result, fp128* byval %a, fp128* byval %b, fp128* byval %c, fp128* byval %d) {
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entry:
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%0 = load fp128, fp128* %a, align 8
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%1 = load fp128, fp128* %b, align 8
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%2 = load fp128, fp128* %c, align 8
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%3 = load fp128, fp128* %d, align 8
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%4 = fadd fp128 %0, %1
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%5 = fsub fp128 %4, %2
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%6 = fmul fp128 %5, %3
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%7 = fdiv fp128 %6, %4
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store fp128 %7, fp128* %scalar.result, align 8
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ret void
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}
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; CHECK-LABEL: f128_spill:
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; CHECK: std %f{{.+}}, [%[[S0:.+]]]
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; CHECK: std %f{{.+}}, [%[[S1:.+]]]
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; CHECK-DAG: ldd [%[[S0]]], %f{{.+}}
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; CHECK-DAG: ldd [%[[S1]]], %f{{.+}}
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; CHECK: jmp {{%[oi]7}}+12
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define void @f128_spill(fp128* noalias sret %scalar.result, fp128* byval %a) {
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entry:
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%0 = load fp128, fp128* %a, align 8
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call void asm sideeffect "", "~{f0},~{f1},~{f2},~{f3},~{f4},~{f5},~{f6},~{f7},~{f8},~{f9},~{f10},~{f11},~{f12},~{f13},~{f14},~{f15},~{f16},~{f17},~{f18},~{f19},~{f20},~{f21},~{f22},~{f23},~{f24},~{f25},~{f26},~{f27},~{f28},~{f29},~{f30},~{f31}"()
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store fp128 %0, fp128* %scalar.result, align 8
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ret void
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}
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; CHECK-LABEL: f128_spill_large:
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; CHECK: sethi 4, %g1
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; CHECK: sethi 4, %g1
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; CHECK-NEXT: add %g1, %sp, %g1
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; CHECK-NEXT: std %f{{.+}}, [%g1]
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; CHECK: sethi 4, %g1
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; CHECK-NEXT: add %g1, %sp, %g1
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; CHECK-NEXT: std %f{{.+}}, [%g1+8]
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; CHECK: sethi 4, %g1
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; CHECK-NEXT: add %g1, %sp, %g1
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; CHECK-NEXT: ldd [%g1], %f{{.+}}
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; CHECK: sethi 4, %g1
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; CHECK-NEXT: add %g1, %sp, %g1
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; CHECK-NEXT: ldd [%g1+8], %f{{.+}}
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define void @f128_spill_large(<251 x fp128>* noalias sret %scalar.result, <251 x fp128>* byval %a) {
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entry:
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%0 = load <251 x fp128>, <251 x fp128>* %a, align 8
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call void asm sideeffect "", "~{f0},~{f1},~{f2},~{f3},~{f4},~{f5},~{f6},~{f7},~{f8},~{f9},~{f10},~{f11},~{f12},~{f13},~{f14},~{f15},~{f16},~{f17},~{f18},~{f19},~{f20},~{f21},~{f22},~{f23},~{f24},~{f25},~{f26},~{f27},~{f28},~{f29},~{f30},~{f31}"()
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store <251 x fp128> %0, <251 x fp128>* %scalar.result, align 8
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ret void
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}
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; CHECK-LABEL: f128_compare:
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; HARD: fcmpq
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; HARD-NEXT: nop
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; SOFT: _Q_cmp
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define i32 @f128_compare(fp128* byval %f0, fp128* byval %f1, i32 %a, i32 %b) {
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entry:
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%0 = load fp128, fp128* %f0, align 8
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%1 = load fp128, fp128* %f1, align 8
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%cond = fcmp ult fp128 %0, %1
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%ret = select i1 %cond, i32 %a, i32 %b
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ret i32 %ret
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}
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; CHECK-LABEL: f128_compare2:
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; HARD: fcmpq
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; HARD: fb{{ule|g}}
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; SOFT: _Q_cmp
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; SOFT: cmp
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define i32 @f128_compare2(fp128* byval %f0) {
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entry:
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%0 = load fp128, fp128* %f0, align 8
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%1 = fcmp ogt fp128 %0, 0xL00000000000000000000000000000000
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br i1 %1, label %"5", label %"7"
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"5": ; preds = %entry
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ret i32 0
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"7": ; preds = %entry
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ret i32 1
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}
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; CHECK-LABEL: f128_abs:
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; CHECK: ldd [%o0], %f0
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; CHECK: ldd [%o0+8], %f2
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; BE: fabss %f0, %f0
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; EL: fabss %f3, %f3
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define void @f128_abs(fp128* noalias sret %scalar.result, fp128* byval %a) {
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entry:
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%0 = load fp128, fp128* %a, align 8
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%1 = tail call fp128 @llvm.fabs.f128(fp128 %0)
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store fp128 %1, fp128* %scalar.result, align 8
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ret void
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}
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declare fp128 @llvm.fabs.f128(fp128) nounwind readonly
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; CHECK-LABEL: int_to_f128:
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; HARD: fitoq
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; SOFT: _Q_itoq
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; SOFT: unimp 16
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define void @int_to_f128(fp128* noalias sret %scalar.result, i32 %i) {
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entry:
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%0 = sitofp i32 %i to fp128
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store fp128 %0, fp128* %scalar.result, align 8
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ret void
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}
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; CHECK-LABEL: fp128_unaligned:
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; CHECK: ldub
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; HARD: faddq
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; SOFT: call _Q_add
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; SOFT: unimp 16
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; CHECK: stb
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; CHECK: ret
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define void @fp128_unaligned(fp128* %a, fp128* %b, fp128* %c) {
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entry:
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%0 = load fp128, fp128* %a, align 1
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%1 = load fp128, fp128* %b, align 1
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%2 = fadd fp128 %0, %1
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store fp128 %2, fp128* %c, align 1
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ret void
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}
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; CHECK-LABEL: uint_to_f128:
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; HARD: fdtoq
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; SOFT: _Q_utoq
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; SOFT: unimp 16
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define void @uint_to_f128(fp128* noalias sret %scalar.result, i32 %i) {
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entry:
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%0 = uitofp i32 %i to fp128
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store fp128 %0, fp128* %scalar.result, align 8
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ret void
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}
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; CHECK-LABEL: f128_to_i32:
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; HARD: fqtoi
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; HARD: fqtoi
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; SOFT: call _Q_qtou
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; SOFT: call _Q_qtoi
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define i32 @f128_to_i32(fp128* %a, fp128* %b) {
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entry:
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%0 = load fp128, fp128* %a, align 8
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%1 = load fp128, fp128* %b, align 8
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%2 = fptoui fp128 %0 to i32
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%3 = fptosi fp128 %1 to i32
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%4 = add i32 %2, %3
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ret i32 %4
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}
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; CHECK-LABEL: test_itoq_qtoi
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; HARD-DAG: call _Q_lltoq
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; HARD-DAG: call _Q_qtoll
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; HARD-DAG: fitoq
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; HARD-DAG: fqtoi
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; SOFT-DAG: call _Q_lltoq
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; SOFT-DAG: unimp 16
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; SOFT-DAG: call _Q_qtoll
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; SOFT-DAG: call _Q_itoq
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; SOFT-DAG: unimp 16
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; SOFT-DAG: call _Q_qtoi
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define void @test_itoq_qtoi(i64 %a, i32 %b, fp128* %c, fp128* %d, i64* %ptr0, fp128* %ptr1) {
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entry:
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%0 = sitofp i64 %a to fp128
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store fp128 %0, fp128* %ptr1, align 8
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%cval = load fp128, fp128* %c, align 8
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%1 = fptosi fp128 %cval to i64
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store i64 %1, i64* %ptr0, align 8
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%2 = sitofp i32 %b to fp128
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store fp128 %2, fp128* %ptr1, align 8
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%dval = load fp128, fp128* %d, align 8
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%3 = fptosi fp128 %dval to i32
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%4 = bitcast i64* %ptr0 to i32*
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store i32 %3, i32* %4, align 8
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ret void
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}
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; CHECK-LABEL: test_utoq_qtou:
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; CHECK-DAG: call _Q_ulltoq
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; CHECK-DAG: call _Q_qtoull
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; HARD-DAG: fdtoq
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; HARD-DAG: fqtoi
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; SOFT-DAG: call _Q_utoq
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; SOFT-DAG: unimp 16
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; SOFT-DAG: call _Q_qtou
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define void @test_utoq_qtou(i64 %a, i32 %b, fp128* %c, fp128* %d, i64* %ptr0, fp128* %ptr1) {
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entry:
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%0 = uitofp i64 %a to fp128
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store fp128 %0, fp128* %ptr1, align 8
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%cval = load fp128, fp128* %c, align 8
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%1 = fptoui fp128 %cval to i64
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store i64 %1, i64* %ptr0, align 8
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%2 = uitofp i32 %b to fp128
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store fp128 %2, fp128* %ptr1, align 8
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%dval = load fp128, fp128* %d, align 8
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%3 = fptoui fp128 %dval to i32
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%4 = bitcast i64* %ptr0 to i32*
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store i32 %3, i32* %4, align 8
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ret void
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}
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; CHECK-LABEL: f128_neg:
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; CHECK: ldd [%o0], %f0
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; CHECK: ldd [%o0+8], %f2
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; BE: fnegs %f0, %f0
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; EL: fnegs %f3, %f3
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define void @f128_neg(fp128* noalias sret %scalar.result, fp128* byval %a) {
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entry:
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%0 = load fp128, fp128* %a, align 8
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%1 = fsub fp128 0xL00000000000000008000000000000000, %0
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store fp128 %1, fp128* %scalar.result, align 8
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ret void
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}
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