forked from OSchip/llvm-project
61 lines
1.8 KiB
LLVM
61 lines
1.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X86
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X64
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define <8 x i32> @select00(i32 %a, <8 x i32> %b) nounwind {
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; X86-LABEL: select00:
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; X86: # %bb.0:
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; X86-NEXT: cmpl $255, {{[0-9]+}}(%esp)
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; X86-NEXT: vxorps %xmm1, %xmm1, %xmm1
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; X86-NEXT: je .LBB0_2
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; X86-NEXT: # %bb.1:
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; X86-NEXT: vmovaps %ymm0, %ymm1
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; X86-NEXT: .LBB0_2:
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; X86-NEXT: vxorps %ymm1, %ymm0, %ymm0
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; X86-NEXT: retl
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;
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; X64-LABEL: select00:
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; X64: # %bb.0:
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; X64-NEXT: cmpl $255, %edi
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; X64-NEXT: vxorps %xmm1, %xmm1, %xmm1
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; X64-NEXT: je .LBB0_2
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; X64-NEXT: # %bb.1:
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; X64-NEXT: vmovaps %ymm0, %ymm1
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; X64-NEXT: .LBB0_2:
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; X64-NEXT: vxorps %ymm1, %ymm0, %ymm0
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; X64-NEXT: retq
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%cmpres = icmp eq i32 %a, 255
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%selres = select i1 %cmpres, <8 x i32> zeroinitializer, <8 x i32> %b
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%res = xor <8 x i32> %b, %selres
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ret <8 x i32> %res
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}
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define <4 x i64> @select01(i32 %a, <4 x i64> %b) nounwind {
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; X86-LABEL: select01:
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; X86: # %bb.0:
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; X86-NEXT: cmpl $255, {{[0-9]+}}(%esp)
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; X86-NEXT: vxorps %xmm1, %xmm1, %xmm1
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; X86-NEXT: je .LBB1_2
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; X86-NEXT: # %bb.1:
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; X86-NEXT: vmovaps %ymm0, %ymm1
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; X86-NEXT: .LBB1_2:
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; X86-NEXT: vxorps %ymm1, %ymm0, %ymm0
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; X86-NEXT: retl
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;
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; X64-LABEL: select01:
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; X64: # %bb.0:
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; X64-NEXT: cmpl $255, %edi
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; X64-NEXT: vxorps %xmm1, %xmm1, %xmm1
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; X64-NEXT: je .LBB1_2
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; X64-NEXT: # %bb.1:
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; X64-NEXT: vmovaps %ymm0, %ymm1
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; X64-NEXT: .LBB1_2:
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; X64-NEXT: vxorps %ymm1, %ymm0, %ymm0
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; X64-NEXT: retq
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%cmpres = icmp eq i32 %a, 255
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%selres = select i1 %cmpres, <4 x i64> zeroinitializer, <4 x i64> %b
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%res = xor <4 x i64> %b, %selres
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ret <4 x i64> %res
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}
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