forked from OSchip/llvm-project
85 lines
3.1 KiB
LLVM
85 lines
3.1 KiB
LLVM
; RUN: opt < %s -msan-check-access-address=0 -S -passes=msan 2>&1 | FileCheck \
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; RUN: %s
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; RUN: opt < %s -msan -msan-check-access-address=0 -S | FileCheck %s
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; REQUIRES: x86-registered-target
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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declare <4 x float> @llvm.x86.sse.cmp.ss(<4 x float>, <4 x float>, i8) nounwind readnone
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declare <4 x float> @llvm.x86.sse.cmp.ps(<4 x float>, <4 x float>, i8) nounwind readnone
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declare <2 x double> @llvm.x86.sse2.cmp.sd(<2 x double>, <2 x double>, i8) nounwind readnone
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declare i32 @llvm.x86.sse.comineq.ss(<4 x float>, <4 x float>) nounwind readnone
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declare i32 @llvm.x86.sse2.ucomilt.sd(<2 x double>, <2 x double>) nounwind readnone
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define <4 x float> @test_sse_cmp_ss(<4 x float> %a, <4 x float> %b) sanitize_memory {
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entry:
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%0 = tail call <4 x float> @llvm.x86.sse.cmp.ss(<4 x float> %a, <4 x float> %b, i8 4)
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ret <4 x float> %0
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}
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; CHECK-LABEL: @test_sse_cmp_ss
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; CHECK: %[[A:.*]] = or <4 x i32>
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; CHECK: %[[B:.*]] = extractelement <4 x i32> %[[A]], i64 0
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; CHECK: %[[C:.*]] = icmp ne i32 %[[B]], 0
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; CHECK: %[[D:.*]] = sext i1 %[[C]] to i128
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; CHECK: %[[E:.*]] = bitcast i128 %[[D]] to <4 x i32>
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; CHECK: store <4 x i32> %[[E]]
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define <4 x float> @test_sse_cmp_ps(<4 x float> %a, <4 x float> %b) sanitize_memory {
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entry:
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%0 = tail call <4 x float> @llvm.x86.sse.cmp.ps(<4 x float> %a, <4 x float> %b, i8 4)
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ret <4 x float> %0
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}
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; CHECK-LABEL: @test_sse_cmp_ps
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; CHECK: %[[A:.*]] = or <4 x i32>
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; CHECK: %[[B:.*]] = icmp ne <4 x i32> %[[A]], zeroinitializer
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; CHECK: %[[C:.*]] = sext <4 x i1> %[[B]] to <4 x i32>
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; CHECK: store <4 x i32> %[[C]]
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define <2 x double> @test_sse2_cmp_sd(<2 x double> %a, <2 x double> %b) sanitize_memory {
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entry:
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%0 = tail call <2 x double> @llvm.x86.sse2.cmp.sd(<2 x double> %a, <2 x double> %b, i8 4)
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ret <2 x double> %0
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}
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; CHECK-LABEL: @test_sse2_cmp_sd
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; CHECK: %[[A:.*]] = or <2 x i64>
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; CHECK: %[[B:.*]] = extractelement <2 x i64> %[[A]], i64 0
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; CHECK: %[[C:.*]] = icmp ne i64 %[[B]], 0
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; CHECK: %[[D:.*]] = sext i1 %[[C]] to i128
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; CHECK: %[[E:.*]] = bitcast i128 %[[D]] to <2 x i64>
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; CHECK: store <2 x i64> %[[E]]
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define i32 @test_sse_comineq_ss(<4 x float> %a, <4 x float> %b) sanitize_memory {
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entry:
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%0 = tail call i32 @llvm.x86.sse.comineq.ss(<4 x float> %a, <4 x float> %b)
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ret i32 %0
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}
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; CHECK-LABEL: @test_sse_comineq_ss
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; CHECK: %[[A:.*]] = or <4 x i32>
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; CHECK: %[[B:.*]] = extractelement <4 x i32> %[[A]], i64 0
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; CHECK: %[[C:.*]] = icmp ne i32 %[[B]], 0
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; CHECK: %[[D:.*]] = sext i1 %[[C]] to i32
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; CHECK: store i32 %[[D]]
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define i32 @test_sse2_ucomilt_sd(<2 x double> %a, <2 x double> %b) sanitize_memory {
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entry:
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%0 = tail call i32 @llvm.x86.sse2.ucomilt.sd(<2 x double> %a, <2 x double> %b)
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ret i32 %0
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}
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; CHECK-LABEL: @test_sse2_ucomilt_sd
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; CHECK: %[[A:.*]] = or <2 x i64>
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; CHECK: %[[B:.*]] = extractelement <2 x i64> %[[A]], i64 0
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; CHECK: %[[C:.*]] = icmp ne i64 %[[B]], 0
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; CHECK: %[[D:.*]] = sext i1 %[[C]] to i32
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; CHECK: store i32 %[[D]]
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