forked from OSchip/llvm-project
				
			
		
			
				
	
	
		
			174 lines
		
	
	
		
			7.4 KiB
		
	
	
	
		
			C++
		
	
	
	
			
		
		
	
	
			174 lines
		
	
	
		
			7.4 KiB
		
	
	
	
		
			C++
		
	
	
	
| //===-- xray_mips64.cc ------------------------------------------*- C++ -*-===//
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| //
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| //                     The LLVM Compiler Infrastructure
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| //
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| // This file is distributed under the University of Illinois Open Source
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| // License. See LICENSE.TXT for details.
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| //
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| //===----------------------------------------------------------------------===//
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| //
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| // This file is a part of XRay, a dynamic runtime instrumentation system.
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| //
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| // Implementation of MIPS64-specific routines.
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| //
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| //===----------------------------------------------------------------------===//
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| #include "sanitizer_common/sanitizer_common.h"
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| #include "xray_defs.h"
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| #include "xray_interface_internal.h"
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| #include <atomic>
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| 
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| namespace __xray {
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| 
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| // The machine codes for some instructions used in runtime patching.
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| enum PatchOpcodes : uint32_t {
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|   PO_DADDIU = 0x64000000, // daddiu rt, rs, imm
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|   PO_SD = 0xFC000000,     // sd rt, base(offset)
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|   PO_LUI = 0x3C000000,    // lui rt, imm
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|   PO_ORI = 0x34000000,    // ori rt, rs, imm
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|   PO_DSLL = 0x00000038,   // dsll rd, rt, sa
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|   PO_JALR = 0x00000009,   // jalr rs
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|   PO_LD = 0xDC000000,     // ld rt, base(offset)
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|   PO_B60 = 0x1000000f,    // b #60
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|   PO_NOP = 0x0,           // nop
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| };
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| 
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| enum RegNum : uint32_t {
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|   RN_T0 = 0xC,
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|   RN_T9 = 0x19,
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|   RN_RA = 0x1F,
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|   RN_SP = 0x1D,
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| };
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| 
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| inline static uint32_t encodeInstruction(uint32_t Opcode, uint32_t Rs,
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|                                          uint32_t Rt,
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|                                          uint32_t Imm) XRAY_NEVER_INSTRUMENT {
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|   return (Opcode | Rs << 21 | Rt << 16 | Imm);
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| }
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| 
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| inline static uint32_t
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| encodeSpecialInstruction(uint32_t Opcode, uint32_t Rs, uint32_t Rt, uint32_t Rd,
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|                          uint32_t Imm) XRAY_NEVER_INSTRUMENT {
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|   return (Rs << 21 | Rt << 16 | Rd << 11 | Imm << 6 | Opcode);
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| }
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| 
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| inline static bool patchSled(const bool Enable, const uint32_t FuncId,
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|                              const XRaySledEntry &Sled,
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|                              void (*TracingHook)()) XRAY_NEVER_INSTRUMENT {
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|   // When |Enable| == true,
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|   // We replace the following compile-time stub (sled):
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|   //
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|   // xray_sled_n:
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|   //	B .tmpN
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|   //	15 NOPs (60 bytes)
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|   //	.tmpN
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|   //
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|   // With the following runtime patch:
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|   //
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|   // xray_sled_n (64-bit):
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|   //    daddiu sp, sp, -16                      ;create stack frame
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|   //    nop
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|   //    sd ra, 8(sp)                            ;save return address
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|   //    sd t9, 0(sp)                            ;save register t9
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|   //    lui t9, %highest(__xray_FunctionEntry/Exit)
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|   //    ori t9, t9, %higher(__xray_FunctionEntry/Exit)
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|   //    dsll t9, t9, 16
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|   //    ori t9, t9, %hi(__xray_FunctionEntry/Exit)
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|   //    dsll t9, t9, 16
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|   //    ori t9, t9, %lo(__xray_FunctionEntry/Exit)
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|   //    lui t0, %hi(function_id)
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|   //    jalr t9                                 ;call Tracing hook
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|   //    ori t0, t0, %lo(function_id)            ;pass function id (delay slot)
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|   //    ld t9, 0(sp)                            ;restore register t9
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|   //    ld ra, 8(sp)                            ;restore return address
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|   //    daddiu sp, sp, 16                       ;delete stack frame
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|   //
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|   // Replacement of the first 4-byte instruction should be the last and atomic
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|   // operation, so that the user code which reaches the sled concurrently
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|   // either jumps over the whole sled, or executes the whole sled when the
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|   // latter is ready.
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|   //
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|   // When |Enable|==false, we set back the first instruction in the sled to be
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|   //   B #60
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| 
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|   if (Enable) {
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|     uint32_t LoTracingHookAddr =
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|         reinterpret_cast<int64_t>(TracingHook) & 0xffff;
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|     uint32_t HiTracingHookAddr =
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|         (reinterpret_cast<int64_t>(TracingHook) >> 16) & 0xffff;
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|     uint32_t HigherTracingHookAddr =
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|         (reinterpret_cast<int64_t>(TracingHook) >> 32) & 0xffff;
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|     uint32_t HighestTracingHookAddr =
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|         (reinterpret_cast<int64_t>(TracingHook) >> 48) & 0xffff;
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|     uint32_t LoFunctionID = FuncId & 0xffff;
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|     uint32_t HiFunctionID = (FuncId >> 16) & 0xffff;
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|     *reinterpret_cast<uint32_t *>(Sled.Address + 8) = encodeInstruction(
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|         PatchOpcodes::PO_SD, RegNum::RN_SP, RegNum::RN_RA, 0x8);
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|     *reinterpret_cast<uint32_t *>(Sled.Address + 12) = encodeInstruction(
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|         PatchOpcodes::PO_SD, RegNum::RN_SP, RegNum::RN_T9, 0x0);
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|     *reinterpret_cast<uint32_t *>(Sled.Address + 16) = encodeInstruction(
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|         PatchOpcodes::PO_LUI, 0x0, RegNum::RN_T9, HighestTracingHookAddr);
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|     *reinterpret_cast<uint32_t *>(Sled.Address + 20) =
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|         encodeInstruction(PatchOpcodes::PO_ORI, RegNum::RN_T9, RegNum::RN_T9,
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|                           HigherTracingHookAddr);
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|     *reinterpret_cast<uint32_t *>(Sled.Address + 24) = encodeSpecialInstruction(
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|         PatchOpcodes::PO_DSLL, 0x0, RegNum::RN_T9, RegNum::RN_T9, 0x10);
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|     *reinterpret_cast<uint32_t *>(Sled.Address + 28) = encodeInstruction(
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|         PatchOpcodes::PO_ORI, RegNum::RN_T9, RegNum::RN_T9, HiTracingHookAddr);
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|     *reinterpret_cast<uint32_t *>(Sled.Address + 32) = encodeSpecialInstruction(
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|         PatchOpcodes::PO_DSLL, 0x0, RegNum::RN_T9, RegNum::RN_T9, 0x10);
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|     *reinterpret_cast<uint32_t *>(Sled.Address + 36) = encodeInstruction(
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|         PatchOpcodes::PO_ORI, RegNum::RN_T9, RegNum::RN_T9, LoTracingHookAddr);
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|     *reinterpret_cast<uint32_t *>(Sled.Address + 40) = encodeInstruction(
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|         PatchOpcodes::PO_LUI, 0x0, RegNum::RN_T0, HiFunctionID);
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|     *reinterpret_cast<uint32_t *>(Sled.Address + 44) = encodeSpecialInstruction(
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|         PatchOpcodes::PO_JALR, RegNum::RN_T9, 0x0, RegNum::RN_RA, 0X0);
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|     *reinterpret_cast<uint32_t *>(Sled.Address + 48) = encodeInstruction(
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|         PatchOpcodes::PO_ORI, RegNum::RN_T0, RegNum::RN_T0, LoFunctionID);
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|     *reinterpret_cast<uint32_t *>(Sled.Address + 52) = encodeInstruction(
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|         PatchOpcodes::PO_LD, RegNum::RN_SP, RegNum::RN_T9, 0x0);
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|     *reinterpret_cast<uint32_t *>(Sled.Address + 56) = encodeInstruction(
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|         PatchOpcodes::PO_LD, RegNum::RN_SP, RegNum::RN_RA, 0x8);
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|     *reinterpret_cast<uint32_t *>(Sled.Address + 60) = encodeInstruction(
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|         PatchOpcodes::PO_DADDIU, RegNum::RN_SP, RegNum::RN_SP, 0x10);
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|     uint32_t CreateStackSpace = encodeInstruction(
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|         PatchOpcodes::PO_DADDIU, RegNum::RN_SP, RegNum::RN_SP, 0xfff0);
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|     std::atomic_store_explicit(
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|         reinterpret_cast<std::atomic<uint32_t> *>(Sled.Address),
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|         CreateStackSpace, std::memory_order_release);
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|   } else {
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|     std::atomic_store_explicit(
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|         reinterpret_cast<std::atomic<uint32_t> *>(Sled.Address),
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|         uint32_t(PatchOpcodes::PO_B60), std::memory_order_release);
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|   }
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|   return true;
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| }
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| 
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| bool patchFunctionEntry(const bool Enable, const uint32_t FuncId,
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|                         const XRaySledEntry &Sled,
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|                         void (*Trampoline)()) XRAY_NEVER_INSTRUMENT {
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|   return patchSled(Enable, FuncId, Sled, Trampoline);
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| }
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| 
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| bool patchFunctionExit(const bool Enable, const uint32_t FuncId,
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|                        const XRaySledEntry &Sled) XRAY_NEVER_INSTRUMENT {
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|   return patchSled(Enable, FuncId, Sled, __xray_FunctionExit);
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| }
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| 
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| bool patchFunctionTailExit(const bool Enable, const uint32_t FuncId,
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|                            const XRaySledEntry &Sled) XRAY_NEVER_INSTRUMENT {
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|   // FIXME: In the future we'd need to distinguish between non-tail exits and
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|   // tail exits for better information preservation.
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|   return patchSled(Enable, FuncId, Sled, __xray_FunctionExit);
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| }
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| 
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| bool patchCustomEvent(const bool Enable, const uint32_t FuncId,
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|                       const XRaySledEntry &Sled) XRAY_NEVER_INSTRUMENT {
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|   // FIXME: Implement in mips64?
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|   return false;
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| }
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| } // namespace __xray
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| 
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| extern "C" void __xray_ArgLoggerEntry() XRAY_NEVER_INSTRUMENT {
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|   // FIXME: this will have to be implemented in the trampoline assembly file
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| }
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