forked from OSchip/llvm-project
101 lines
3.2 KiB
LLVM
101 lines
3.2 KiB
LLVM
; RUN: llc -mtriple armv7 -target-abi apcs -O0 -o - < %s \
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; RUN: | FileCheck %s -check-prefix CHECK-TAIL -check-prefix CHECK
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; RUN: llc -mtriple armv7 -target-abi apcs -O0 -disable-tail-calls -o - < %s \
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; RUN: | FileCheck %s -check-prefix CHECK-NO-TAIL -check-prefix CHECK
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; RUN: llc -mtriple armv7 -target-abi aapcs -O0 -o - < %s \
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; RUN: | FileCheck %s -check-prefix CHECK-TAIL-AAPCS -check-prefix CHECK
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declare i32 @callee(i32 %i)
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declare extern_weak fastcc void @callee_weak()
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define i32 @caller(i32 %i) {
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entry:
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%r = tail call i32 @callee(i32 %i)
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ret i32 %r
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}
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; CHECK-TAIL-LABEL: caller
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; CHECK-TAIL: b callee
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; CHECK-NO-TAIL-LABEL: caller
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; CHECK-NO-TAIL: push {lr}
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; CHECK-NO-TAIL: bl callee
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; CHECK-NO-TAIL: pop {lr}
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; CHECK-NO-TAIL: bx lr
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; Weakly-referenced extern functions cannot be tail-called, as AAELF does
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; not define the behaviour of branch instructions to undefined weak symbols.
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define fastcc void @caller_weak() {
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; CHECK-LABEL: caller_weak:
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; CHECK: bl callee_weak
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tail call void @callee_weak()
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ret void
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}
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; A tail call can be optimized if all the arguments can be passed in registers
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; R0-R3, or the remaining arguments are already in the caller's parameter area
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; in the stack. Variadic functions are no different.
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declare i32 @variadic(i32, ...)
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; e.g. four integers
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define void @v_caller_ints1(i32 %a, i32 %b) {
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; CHECK-LABEL: v_caller_ints1:
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; CHECK-TAIL: b variadic
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; CHECK-TAIL-AAPCS: b variadic
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; CHECK-NO-TAIL: bl variadic
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entry:
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%call = tail call i32 (i32, ...) @variadic(i32 %a, i32 %b, i32 %b, i32 %a)
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ret void
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}
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; e.g. two 32-bit integers, one 64-bit integer (needs to span two regs)
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define void @v_caller_ints2(i32 %y, i64 %z) {
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; CHECK-LABEL: v_caller_ints2:
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; CHECK-TAIL: b variadic
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; CHECK-TAIL-AAPCS: b variadic
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; CHECK-NO-TAIL: bl variadic
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entry:
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%call = tail call i32 (i32, ...) @variadic(i32 %y, i32 %y, i64 %z)
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ret void
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}
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; e.g. two 32-bit integers, one 64-bit integer (needs to span two regs). Notice
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; that %z is passed in r1-r2 if APCS is used, contrary to AAPCS where r2-r3
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; would be used (since double-word types must start at an even register). In the
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; latter case, the third argument needs to be passed through the stack.
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define void @v_caller_ints3(i32 %y, i64 %z) {
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; CHECK-LABEL: v_caller_ints3:
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; CHECK-TAIL: b variadic
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; CHECK-TAIL-AAPCS: bl variadic
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; CHECK-NO-TAIL: bl variadic
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entry:
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%call = tail call i32 (i32, ...) @variadic(i32 %y, i64 %z, i32 %y)
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ret void
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}
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; e.g. two 32-bit integers, one 64-bit integer and another 64-bit integer that
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; doesn't fit in r0-r3 but comes from the caller argument list and is in the
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; same position.
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define void @v_caller_ints4(i64 %a, i32 %b, i32 %c, i64 %d) {
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; CHECK-LABEL: v_caller_ints4:
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; CHECK-TAIL: b variadic
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; CHECK-TAIL-AAPCS: b variadic
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; CHECK-NO-TAIL: bl variadic
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entry:
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%call = tail call i32 (i32, ...) @variadic(i32 %b, i32 %c, i64 %a, i64 %d)
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ret void
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}
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; If the arguments do not fit in r0-r3 and the existing parameters cannot be
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; taken from the caller's parameter region, the optimization is not supported.
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; e.g. one 32-bit integer, two 64-bit integers
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define void @v_caller_ints_fail(i32 %y, i64 %z) {
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; CHECK-LABEL: v_caller_ints_fail:
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; CHECK: bl variadic
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entry:
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%call = tail call i32 (i32, ...) @variadic(i32 %y, i64 %z, i64 %z)
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ret void
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}
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