forked from OSchip/llvm-project
92 lines
2.9 KiB
C++
92 lines
2.9 KiB
C++
//===-- TestArmv7Disassembly.cpp ------------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "gtest/gtest.h"
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#include "lldb/Core/Address.h"
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#include "lldb/Core/Disassembler.h"
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#include "lldb/Utility/ArchSpec.h"
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#include "lldb/Target/ExecutionContext.h"
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#include "Plugins/Disassembler/LLVMC/DisassemblerLLVMC.h"
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#include "llvm/Support/TargetSelect.h"
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using namespace lldb;
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using namespace lldb_private;
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class TestArmv7Disassembly : public testing::Test {
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public:
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static void SetUpTestCase();
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static void TearDownTestCase();
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// virtual void SetUp() override { }
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// virtual void TearDown() override { }
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protected:
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};
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void TestArmv7Disassembly::SetUpTestCase() {
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llvm::InitializeAllTargets();
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llvm::InitializeAllAsmPrinters();
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llvm::InitializeAllTargetMCs();
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llvm::InitializeAllDisassemblers();
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DisassemblerLLVMC::Initialize();
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}
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void TestArmv7Disassembly::TearDownTestCase() {
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DisassemblerLLVMC::Terminate();
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}
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TEST_F(TestArmv7Disassembly, TestCortexFPDisass) {
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ArchSpec arch("armv7em--");
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const unsigned num_of_instructions = 3;
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uint8_t data[] = {
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0x00, 0xee, 0x10, 0x2a, // 0xee002a10 : vmov s0, r2
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0xb8, 0xee, 0xc0, 0x0b, // 0xeeb80bc0 : vcvt.f64.s32 d0, s0
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0xb6, 0xee, 0x00, 0x0a, // 0xeeb60a00 : vmov.f32 s0, #5.000000e-01
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};
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// these can be disassembled by hand with llvm-mc, e.g.
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//
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// 0x00, 0xee, 0x10, 0x2a, // 0xee002a10 : vmov s0, r2
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//
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// echo 0x00 0xee 0x10 0x2a | llvm-mc -arch thumb -disassemble -mattr=+fp-armv8
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// vmov s0, r2
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DisassemblerSP disass_sp;
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Address start_addr(0x100);
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disass_sp = Disassembler::DisassembleBytes(arch, nullptr, nullptr, start_addr,
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&data, sizeof (data), num_of_instructions, false);
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// If we failed to get a disassembler, we can assume it is because
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// the llvm we linked against was not built with the ARM target,
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// and we should skip these tests without marking anything as failing.
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if (disass_sp) {
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const InstructionList inst_list (disass_sp->GetInstructionList());
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EXPECT_EQ (num_of_instructions, inst_list.GetSize());
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InstructionSP inst_sp;
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const char *mnemonic;
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ExecutionContext exe_ctx (nullptr, nullptr, nullptr);
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inst_sp = inst_list.GetInstructionAtIndex (0);
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mnemonic = inst_sp->GetMnemonic(&exe_ctx);
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ASSERT_STREQ ("vmov", mnemonic);
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inst_sp = inst_list.GetInstructionAtIndex (1);
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mnemonic = inst_sp->GetMnemonic(&exe_ctx);
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ASSERT_STREQ ("vcvt.f64.s32", mnemonic);
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inst_sp = inst_list.GetInstructionAtIndex (2);
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mnemonic = inst_sp->GetMnemonic(&exe_ctx);
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ASSERT_STREQ ("vmov.f32", mnemonic);
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}
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}
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