forked from OSchip/llvm-project
				
			
		
			
				
	
	
		
			59 lines
		
	
	
		
			2.0 KiB
		
	
	
	
		
			LLVM
		
	
	
	
			
		
		
	
	
			59 lines
		
	
	
		
			2.0 KiB
		
	
	
	
		
			LLVM
		
	
	
	
| ; RUN: llc < %s -mtriple=armv7-apple-ios -O0 | FileCheck %s -check-prefix=NO-REALIGN
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| ; RUN: llc < %s -mtriple=armv7-apple-ios -O0 | FileCheck %s -check-prefix=REALIGN
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| 
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| ; rdar://12713765
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| ; When realign-stack is set to false, make sure we are not creating stack
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| ; objects that are assumed to be 64-byte aligned.
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| @T3_retval = common global <16 x float> zeroinitializer, align 16
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| 
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| define void @test1(<16 x float>* noalias sret %agg.result) nounwind ssp "no-realign-stack" {
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| entry:
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| ; NO-REALIGN: test1
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| ; NO-REALIGN: add [[R2:r[0-9]+]], [[R1:r[0-9]+]], #48
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| ; NO-REALIGN: vst1.64
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| ; NO-REALIGN: add [[R2:r[0-9]+]], [[R1:r[0-9]+]], #32
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| ; NO-REALIGN: vst1.64
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| ; NO-REALIGN: add [[R2:r[0-9]+]], [[R1:r[0-9]+]], #16
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| ; NO-REALIGN: vst1.64
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| ; NO-REALIGN: vst1.64
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| ; NO-REALIGN: add [[R2:r[0-9]+]], [[R1:r[0-9]+]], #48
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| ; NO-REALIGN: vst1.64
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| ; NO-REALIGN: add [[R2:r[0-9]+]], [[R1:r[0-9]+]], #32
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| ; NO-REALIGN: vst1.64
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| ; NO-REALIGN: add [[R2:r[0-9]+]], [[R1:r[0-9]+]], #16
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| ; NO-REALIGN: vst1.64
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| ; NO-REALIGN: vst1.64
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|  %retval = alloca <16 x float>, align 16
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|  %0 = load <16 x float>* @T3_retval, align 16
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|  store <16 x float> %0, <16 x float>* %retval
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|  %1 = load <16 x float>* %retval
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|  store <16 x float> %1, <16 x float>* %agg.result, align 16
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|  ret void
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| }
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| 
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| define void @test2(<16 x float>* noalias sret %agg.result) nounwind ssp {
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| entry:
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| ; REALIGN: test2
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| ; REALIGN: bic sp, sp, #63
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| ; REALIGN: orr [[R2:r[0-9]+]], [[R1:r[0-9]+]], #48
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| ; REALIGN: vst1.64
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| ; REALIGN: orr [[R2:r[0-9]+]], [[R1:r[0-9]+]], #32
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| ; REALIGN: vst1.64
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| ; REALIGN: orr [[R2:r[0-9]+]], [[R1:r[0-9]+]], #16
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| ; REALIGN: vst1.64
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| ; REALIGN: vst1.64
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| ; REALIGN: add [[R2:r[0-9]+]], [[R1:r[0-9]+]], #48
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| ; REALIGN: vst1.64
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| ; REALIGN: add [[R2:r[0-9]+]], [[R1:r[0-9]+]], #32
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| ; REALIGN: vst1.64
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| ; REALIGN: add [[R2:r[0-9]+]], [[R1:r[0-9]+]], #16
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| ; REALIGN: vst1.64
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| ; REALIGN: vst1.64
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|  %retval = alloca <16 x float>, align 16
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|  %0 = load <16 x float>* @T3_retval, align 16
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|  store <16 x float> %0, <16 x float>* %retval
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|  %1 = load <16 x float>* %retval
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|  store <16 x float> %1, <16 x float>* %agg.result, align 16
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|  ret void
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| }
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