forked from OSchip/llvm-project
93 lines
2.7 KiB
LLVM
93 lines
2.7 KiB
LLVM
; RUN: llc < %s -march=xcore | FileCheck %s
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; CHECK-LABEL: atomic_fence
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; CHECK: #MEMBARRIER
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; CHECK: #MEMBARRIER
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; CHECK: #MEMBARRIER
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; CHECK: #MEMBARRIER
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; CHECK: retsp 0
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define void @atomic_fence() nounwind {
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entry:
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fence acquire
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fence release
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fence acq_rel
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fence seq_cst
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ret void
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}
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@pool = external global i64
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define void @atomicloadstore() nounwind {
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entry:
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; CHECK-LABEL: atomicloadstore
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; CHECK: ldw r0, dp[pool]
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; CHECK-NEXT: #MEMBARRIER
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%0 = load atomic i32* bitcast (i64* @pool to i32*) acquire, align 4
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; CHECK-NEXT: ldaw r1, dp[pool]
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; CHECK-NEXT: ldc r2, 0
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; CHECK-NEXT: ld16s r3, r1[r2]
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; CHECK-NEXT: #MEMBARRIER
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%1 = load atomic i16* bitcast (i64* @pool to i16*) acquire, align 2
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; CHECK-NEXT: ld8u r11, r1[r2]
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; CHECK-NEXT: #MEMBARRIER
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%2 = load atomic i8* bitcast (i64* @pool to i8*) acquire, align 1
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; CHECK-NEXT: ldw r4, dp[pool]
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; CHECK-NEXT: #MEMBARRIER
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%3 = load atomic i32* bitcast (i64* @pool to i32*) seq_cst, align 4
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; CHECK-NEXT: ld16s r5, r1[r2]
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; CHECK-NEXT: #MEMBARRIER
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%4 = load atomic i16* bitcast (i64* @pool to i16*) seq_cst, align 2
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; CHECK-NEXT: ld8u r6, r1[r2]
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; CHECK-NEXT: #MEMBARRIER
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%5 = load atomic i8* bitcast (i64* @pool to i8*) seq_cst, align 1
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; CHECK-NEXT: #MEMBARRIER
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; CHECK-NEXT: stw r0, dp[pool]
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store atomic i32 %0, i32* bitcast (i64* @pool to i32*) release, align 4
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; CHECK-NEXT: #MEMBARRIER
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; CHECK-NEXT: st16 r3, r1[r2]
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store atomic i16 %1, i16* bitcast (i64* @pool to i16*) release, align 2
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; CHECK-NEXT: #MEMBARRIER
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; CHECK-NEXT: st8 r11, r1[r2]
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store atomic i8 %2, i8* bitcast (i64* @pool to i8*) release, align 1
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; CHECK-NEXT: #MEMBARRIER
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; CHECK-NEXT: stw r4, dp[pool]
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; CHECK-NEXT: #MEMBARRIER
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store atomic i32 %3, i32* bitcast (i64* @pool to i32*) seq_cst, align 4
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; CHECK-NEXT: #MEMBARRIER
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; CHECK-NEXT: st16 r5, r1[r2]
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; CHECK-NEXT: #MEMBARRIER
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store atomic i16 %4, i16* bitcast (i64* @pool to i16*) seq_cst, align 2
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; CHECK-NEXT: #MEMBARRIER
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; CHECK-NEXT: st8 r6, r1[r2]
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; CHECK-NEXT: #MEMBARRIER
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store atomic i8 %5, i8* bitcast (i64* @pool to i8*) seq_cst, align 1
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; CHECK-NEXT: ldw r0, dp[pool]
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; CHECK-NEXT: stw r0, dp[pool]
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; CHECK-NEXT: ld16s r0, r1[r2]
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; CHECK-NEXT: st16 r0, r1[r2]
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; CHECK-NEXT: ld8u r0, r1[r2]
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; CHECK-NEXT: st8 r0, r1[r2]
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%6 = load atomic i32* bitcast (i64* @pool to i32*) monotonic, align 4
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store atomic i32 %6, i32* bitcast (i64* @pool to i32*) monotonic, align 4
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%7 = load atomic i16* bitcast (i64* @pool to i16*) monotonic, align 2
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store atomic i16 %7, i16* bitcast (i64* @pool to i16*) monotonic, align 2
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%8 = load atomic i8* bitcast (i64* @pool to i8*) monotonic, align 1
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store atomic i8 %8, i8* bitcast (i64* @pool to i8*) monotonic, align 1
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ret void
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}
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