forked from OSchip/llvm-project
				
			
		
			
				
	
	
		
			105 lines
		
	
	
		
			4.0 KiB
		
	
	
	
		
			C++
		
	
	
	
			
		
		
	
	
			105 lines
		
	
	
		
			4.0 KiB
		
	
	
	
		
			C++
		
	
	
	
//===-- SystemZTargetMachine.cpp - Define TargetMachine for SystemZ -------===//
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//
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//                     The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "SystemZTargetMachine.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/Support/TargetRegistry.h"
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#include "llvm/Transforms/Scalar.h"
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#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
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using namespace llvm;
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extern "C" void LLVMInitializeSystemZTarget() {
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  // Register the target.
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  RegisterTargetMachine<SystemZTargetMachine> X(TheSystemZTarget);
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}
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SystemZTargetMachine::SystemZTargetMachine(const Target &T, StringRef TT,
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                                           StringRef CPU, StringRef FS,
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                                           const TargetOptions &Options,
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                                           Reloc::Model RM, CodeModel::Model CM,
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                                           CodeGenOpt::Level OL)
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    : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
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      TLOF(make_unique<TargetLoweringObjectFileELF>()),
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      Subtarget(TT, CPU, FS, *this) {
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  initAsmInfo();
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}
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SystemZTargetMachine::~SystemZTargetMachine() {}
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namespace {
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/// SystemZ Code Generator Pass Configuration Options.
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class SystemZPassConfig : public TargetPassConfig {
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public:
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  SystemZPassConfig(SystemZTargetMachine *TM, PassManagerBase &PM)
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    : TargetPassConfig(TM, PM) {}
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  SystemZTargetMachine &getSystemZTargetMachine() const {
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    return getTM<SystemZTargetMachine>();
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  }
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  void addIRPasses() override;
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  bool addInstSelector() override;
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  bool addPreSched2() override;
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  bool addPreEmitPass() override;
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};
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} // end anonymous namespace
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void SystemZPassConfig::addIRPasses() {
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  TargetPassConfig::addIRPasses();
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}
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bool SystemZPassConfig::addInstSelector() {
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  addPass(createSystemZISelDag(getSystemZTargetMachine(), getOptLevel()));
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  return false;
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}
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bool SystemZPassConfig::addPreSched2() {
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  if (getOptLevel() != CodeGenOpt::None &&
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      getSystemZTargetMachine().getSubtargetImpl()->hasLoadStoreOnCond())
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    addPass(&IfConverterID);
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  return true;
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}
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bool SystemZPassConfig::addPreEmitPass() {
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  // We eliminate comparisons here rather than earlier because some
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  // transformations can change the set of available CC values and we
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  // generally want those transformations to have priority.  This is
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  // especially true in the commonest case where the result of the comparison
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  // is used by a single in-range branch instruction, since we will then
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  // be able to fuse the compare and the branch instead.
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  //
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  // For example, two-address NILF can sometimes be converted into
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  // three-address RISBLG.  NILF produces a CC value that indicates whether
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  // the low word is zero, but RISBLG does not modify CC at all.  On the
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  // other hand, 64-bit ANDs like NILL can sometimes be converted to RISBG.
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  // The CC value produced by NILL isn't useful for our purposes, but the
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  // value produced by RISBG can be used for any comparison with zero
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  // (not just equality).  So there are some transformations that lose
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  // CC values (while still being worthwhile) and others that happen to make
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  // the CC result more useful than it was originally.
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  //
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  // Another reason is that we only want to use BRANCH ON COUNT in cases
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  // where we know that the count register is not going to be spilled.
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  //
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  // Doing it so late makes it more likely that a register will be reused
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  // between the comparison and the branch, but it isn't clear whether
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  // preventing that would be a win or not.
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  if (getOptLevel() != CodeGenOpt::None)
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    addPass(createSystemZElimComparePass(getSystemZTargetMachine()));
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  if (getOptLevel() != CodeGenOpt::None)
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    addPass(createSystemZShortenInstPass(getSystemZTargetMachine()));
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  addPass(createSystemZLongBranchPass(getSystemZTargetMachine()));
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  return true;
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}
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TargetPassConfig *SystemZTargetMachine::createPassConfig(PassManagerBase &PM) {
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  return new SystemZPassConfig(this, PM);
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}
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