forked from OSchip/llvm-project
				
			
		
			
				
	
	
		
			69 lines
		
	
	
		
			2.8 KiB
		
	
	
	
		
			C++
		
	
	
	
			
		
		
	
	
			69 lines
		
	
	
		
			2.8 KiB
		
	
	
	
		
			C++
		
	
	
	
//===-- ARMSelectionDAGInfo.h - ARM SelectionDAG Info -----------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines the ARM subclass for SelectionDAGTargetInfo.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_ARM_ARMSELECTIONDAGINFO_H
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#define LLVM_LIB_TARGET_ARM_ARMSELECTIONDAGINFO_H
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#include "MCTargetDesc/ARMAddressingModes.h"
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#include "llvm/CodeGen/RuntimeLibcalls.h"
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#include "llvm/CodeGen/SelectionDAGTargetInfo.h"
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namespace llvm {
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namespace ARM_AM {
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  static inline ShiftOpc getShiftOpcForNode(unsigned Opcode) {
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    switch (Opcode) {
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    default:          return ARM_AM::no_shift;
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    case ISD::SHL:    return ARM_AM::lsl;
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    case ISD::SRL:    return ARM_AM::lsr;
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    case ISD::SRA:    return ARM_AM::asr;
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    case ISD::ROTR:   return ARM_AM::ror;
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    //case ISD::ROTL:  // Only if imm -> turn into ROTR.
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    // Can't handle RRX here, because it would require folding a flag into
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    // the addressing mode.  :(  This causes us to miss certain things.
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    //case ARMISD::RRX: return ARM_AM::rrx;
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    }
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  }
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}  // end namespace ARM_AM
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class ARMSelectionDAGInfo : public SelectionDAGTargetInfo {
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public:
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  SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, const SDLoc &dl,
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                                  SDValue Chain, SDValue Dst, SDValue Src,
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                                  SDValue Size, unsigned Align, bool isVolatile,
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                                  bool AlwaysInline,
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                                  MachinePointerInfo DstPtrInfo,
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                                  MachinePointerInfo SrcPtrInfo) const override;
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  SDValue
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  EmitTargetCodeForMemmove(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain,
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                           SDValue Dst, SDValue Src, SDValue Size,
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                           unsigned Align, bool isVolatile,
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                           MachinePointerInfo DstPtrInfo,
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                           MachinePointerInfo SrcPtrInfo) const override;
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  // Adjust parameters for memset, see RTABI section 4.3.4
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  SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, const SDLoc &dl,
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                                  SDValue Chain, SDValue Op1, SDValue Op2,
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                                  SDValue Op3, unsigned Align, bool isVolatile,
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                                  MachinePointerInfo DstPtrInfo) const override;
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  SDValue EmitSpecializedLibcall(SelectionDAG &DAG, const SDLoc &dl,
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                                 SDValue Chain, SDValue Dst, SDValue Src,
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                                 SDValue Size, unsigned Align,
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                                 RTLIB::Libcall LC) const;
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};
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}
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#endif
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