forked from OSchip/llvm-project
40 lines
1.5 KiB
LLVM
40 lines
1.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -lsr-complexity-limit=50 -loop-reduce -S %s | FileCheck %s
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target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
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define void @overflow1(i64 %a) {
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; CHECK-LABEL: @overflow1(
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; CHECK-NEXT: bb:
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; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[A:%.*]], -1
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; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[A]], -9223372036854775808
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; CHECK-NEXT: br label [[BB1:%.*]]
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; CHECK: bb1:
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; CHECK-NEXT: [[LSR_IV1:%.*]] = phi i64 [ [[LSR_IV_NEXT2:%.*]], [[BB1]] ], [ [[TMP1]], [[BB:%.*]] ]
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; CHECK-NEXT: [[LSR_IV:%.*]] = phi i64 [ [[LSR_IV_NEXT:%.*]], [[BB1]] ], [ [[TMP0]], [[BB]] ]
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; CHECK-NEXT: [[TMP4:%.*]] = icmp ne i64 [[LSR_IV1]], 0
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; CHECK-NEXT: [[TMP5:%.*]] = and i1 [[TMP4]], true
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; CHECK-NEXT: [[LSR_IV_NEXT]] = add i64 [[LSR_IV]], 1
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; CHECK-NEXT: [[LSR_IV_NEXT2]] = add i64 [[LSR_IV1]], 1
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; CHECK-NEXT: br i1 [[TMP5]], label [[BB1]], label [[BB7:%.*]]
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; CHECK: bb7:
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; CHECK-NEXT: [[TMP9:%.*]] = and i64 [[LSR_IV_NEXT]], 1
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; CHECK-NEXT: [[TMP10:%.*]] = icmp eq i64 [[TMP9]], 0
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; CHECK-NEXT: unreachable
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;
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bb:
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br label %bb1
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bb1: ; preds = %bb1, %bb
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%tmp = phi i64 [ %a, %bb ], [ %tmp6, %bb1 ]
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%tmp4 = icmp ne i64 %tmp, -9223372036854775808
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%tmp5 = and i1 %tmp4, 1
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%tmp6 = add i64 %tmp, 1
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br i1 %tmp5, label %bb1, label %bb7
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bb7: ; preds = %bb1
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%tmp9 = and i64 %tmp, 1
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%tmp10 = icmp eq i64 %tmp9, 0
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unreachable
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}
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