forked from OSchip/llvm-project
36 lines
1.2 KiB
LLVM
36 lines
1.2 KiB
LLVM
; RUN: llc -march=hexagon < %s
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; REQUIRES: asserts
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; The test case validates the fact that if the modifier register value "-268430336"
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; is passed as target constant, then the compiler must not assert.
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; This test also validates that the VLIW Packetizer does not bail out the compilation
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; with "Unknown .new type" when attempting to validate if the circular store can be
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; converted to a new value store.
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target triple = "hexagon"
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; Function Attrs: nounwind
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define zeroext i8 @f0(i8* %a0) local_unnamed_addr #0 {
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b0:
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%v0 = tail call { i32, i8* } @llvm.hexagon.L2.loadrub.pcr(i8* %a0, i32 -268430336, i8* %a0)
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%v1 = extractvalue { i32, i8* } %v0, 0
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%v2 = trunc i32 %v1 to i8
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ret i8 %v2
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}
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; Function Attrs: argmemonly nounwind
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declare { i32, i8* } @llvm.hexagon.L2.loadrub.pcr(i8*, i32, i8* nocapture) #1
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; Function Attrs: nounwind
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define void @f1(i8* %a0, i8 zeroext %a1) local_unnamed_addr #0 {
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b0:
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%v0 = zext i8 %a1 to i32
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%v1 = tail call i8* @llvm.hexagon.S2.storerb.pcr(i8* %a0, i32 -268430336, i32 %v0, i8* %a0)
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ret void
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}
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; Function Attrs: argmemonly nounwind
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declare i8* @llvm.hexagon.S2.storerb.pcr(i8*, i32, i32, i8* nocapture) #1
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attributes #0 = { nounwind "target-cpu"="hexagonv60" }
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attributes #1 = { argmemonly nounwind }
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