llvm-project/llvm/test/Transforms/AtomicExpand
LemonBoy 4751cadcca [AArch64] Prevent spilling between ldxr/stxr pairs
Apply the same logic used to check if CMPXCHG nodes should be expanded
at -O0: the register allocator may end up spilling some register in
between the atomic load/store pairs, breaking the atomicity and possibly
stalling the execution.

Fixes PR48017

Reviewed By: efriedman

Differential Revision: https://reviews.llvm.org/D101163
2021-05-01 17:17:05 +02:00
..
AArch64 [AArch64] Prevent spilling between ldxr/stxr pairs 2021-05-01 17:17:05 +02:00
AMDGPU Copy syncscope when expanding atomicrmw into cmpxchg loop 2021-04-05 17:29:38 -07:00
ARM Revert "[CodeGen][ARM] Implement atomicrmw as pseudo operations at -O0" 2021-04-30 16:53:14 +01:00
Hexagon
Mips
RISCV
SPARC Handle part-word LL/SC in atomic expansion pass 2020-04-28 10:07:39 -05:00
X86