forked from OSchip/llvm-project
71 lines
1.4 KiB
LLVM
71 lines
1.4 KiB
LLVM
; RUN: llc < %s -march=x86 | FileCheck %s
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define i32* @test1(i32* %P, i32 %X) {
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; CHECK: test1:
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; CHECK-NOT: shrl
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; CHECK-NOT: shll
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; CHECK: ret
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entry:
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%Y = lshr i32 %X, 2
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%gep.upgrd.1 = zext i32 %Y to i64
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%P2 = getelementptr i32* %P, i64 %gep.upgrd.1
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ret i32* %P2
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}
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define i32* @test2(i32* %P, i32 %X) {
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; CHECK: test2:
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; CHECK: shll $4
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; CHECK-NOT: shll
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; CHECK: ret
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entry:
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%Y = shl i32 %X, 2
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%gep.upgrd.2 = zext i32 %Y to i64
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%P2 = getelementptr i32* %P, i64 %gep.upgrd.2
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ret i32* %P2
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}
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define i32* @test3(i32* %P, i32 %X) {
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; CHECK: test3:
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; CHECK-NOT: shrl
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; CHECK-NOT: shll
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; CHECK: ret
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entry:
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%Y = ashr i32 %X, 2
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%P2 = getelementptr i32* %P, i32 %Y
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ret i32* %P2
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}
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define fastcc i32 @test4(i32* %d) {
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; CHECK: test4:
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; CHECK-NOT: shrl
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; CHECK: ret
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entry:
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%tmp4 = load i32* %d
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%tmp512 = lshr i32 %tmp4, 24
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ret i32 %tmp512
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}
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define i64 @test5(i16 %i, i32* %arr) {
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; Ensure that we don't fold away shifts which have multiple uses, as they are
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; just re-introduced for the second use.
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; CHECK: test5:
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; CHECK-NOT: shrl
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; CHECK: shrl $11
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; CHECK-NOT: shrl
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; CHECK: ret
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entry:
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%i.zext = zext i16 %i to i32
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%index = lshr i32 %i.zext, 11
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%index.zext = zext i32 %index to i64
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%val.ptr = getelementptr inbounds i32* %arr, i64 %index.zext
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%val = load i32* %val.ptr
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%val.zext = zext i32 %val to i64
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%sum = add i64 %val.zext, %index.zext
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ret i64 %sum
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}
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