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llvm-project/llvm/test/CodeGen/RISCV
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Shiva Chen d58bd8dc4a [RISCV] Expand function call to "call" pseudoinstruction 
To do this:
1. Change GlobalAddress SDNode to TargetGlobalAddress to avoid legalizer
   split the symbol.

2. Change ExternalSymbol SDNode to TargetExternalSymbol to avoid legalizer
   split the symbol.

3. Let PseudoCALL match direct call with target operand TargetGlobalAddress
   and TargetExternalSymbol.

Differential Revision: https://reviews.llvm.org/D44885

llvm-svn: 330827
 		2018-04-25 14:19:12 +00:00
..
addc-adde-sube-subc.ll [RISCV] Implement frame pointer elimination 2018-01-18 11:34:02 +00:00
align.ll [RISCV] Change function alignment to 4 bytes, and 2 bytes for RVC 2018-04-12 11:30:59 +00:00
alloca.ll [RISCV] Expand function call to "call" pseudoinstruction 2018-04-25 14:19:12 +00:00
alu32.ll [RISCV] Expand codegen -> compression sanity checks and move to a single file 2018-04-18 20:17:29 +00:00
analyze-branch.ll [RISCV] Expand function call to "call" pseudoinstruction 2018-04-25 14:19:12 +00:00
bare-select.ll [RISCV] Codegen support for RV32F floating point comparison operations 2018-03-21 15:11:02 +00:00
blockaddress.ll [RISCV] Peephole optimisation for load/store of global values or constant addresses 2018-03-19 11:54:28 +00:00
branch-relaxation.ll [RISCV] Implement frame pointer elimination 2018-01-18 11:34:02 +00:00
branch.ll [RISCV] Expand codegen -> compression sanity checks and move to a single file 2018-04-18 20:17:29 +00:00
bswap-ctlz-cttz-ctpop.ll [RISCV] Expand function call to "call" pseudoinstruction 2018-04-25 14:19:12 +00:00
byval.ll [RISCV] Expand function call to "call" pseudoinstruction 2018-04-25 14:19:12 +00:00
calling-conv-sext-zext.ll [RISCV] Expand function call to "call" pseudoinstruction 2018-04-25 14:19:12 +00:00
calling-conv.ll [RISCV] Expand function call to "call" pseudoinstruction 2018-04-25 14:19:12 +00:00
calls.ll [RISCV] Expand function call to "call" pseudoinstruction 2018-04-25 14:19:12 +00:00
compress-inline-asm.ll [RISCV] Tablegen-driven Instruction Compression. 2018-04-06 21:07:05 +00:00
compress.ll [RISCV] Add test changes missed from rL330293 2018-04-18 20:36:12 +00:00
div.ll [RISCV] Expand function call to "call" pseudoinstruction 2018-04-25 14:19:12 +00:00
double-arith.ll [RISCV] Add codegen support for RV32D floating point arithmetic operations 2018-04-12 05:42:42 +00:00
double-br-fcmp.ll [RISCV] Expand function call to "call" pseudoinstruction 2018-04-25 14:19:12 +00:00
double-calling-conv.ll [RISCV] Expand function call to "call" pseudoinstruction 2018-04-25 14:19:12 +00:00
double-convert.ll [RISCV] Codegen support for RV32D floating point conversion operations 2018-04-12 05:47:15 +00:00
double-fcmp.ll [RISCV] Codegen support for RV32D floating point comparison operations 2018-04-12 05:50:06 +00:00
double-imm.ll [RISCV] Add tests missed in r329871 2018-04-12 05:36:44 +00:00
double-intrinsics.ll [RISCV] Expand function call to "call" pseudoinstruction 2018-04-25 14:19:12 +00:00
double-mem.ll [RISCV] Expand function call to "call" pseudoinstruction 2018-04-25 14:19:12 +00:00
double-previous-failure.ll [RISCV] Expand function call to "call" pseudoinstruction 2018-04-25 14:19:12 +00:00
double-select-fcmp.ll [RISCV] Codegen support for RV32D floating point comparison operations 2018-04-12 05:50:06 +00:00
double-stack-spill-restore.ll [RISCV] Expand function call to "call" pseudoinstruction 2018-04-25 14:19:12 +00:00
float-arith.ll [RISCV] Introduce pattern for materialising immediates with 0 for lower 12 bits 2018-04-18 20:34:23 +00:00
float-br-fcmp.ll [RISCV] Expand function call to "call" pseudoinstruction 2018-04-25 14:19:12 +00:00
float-convert.ll [RISCV] Add codegen for RV32F arithmetic and conversion operations 2018-03-20 12:45:35 +00:00
float-fcmp.ll [RISCV] Codegen support for RV32F floating point comparison operations 2018-03-21 15:11:02 +00:00
float-imm.ll [RISCV] Add codegen for RV32F floating point load/store 2018-03-20 13:26:12 +00:00
float-mem.ll [RISCV] Expand function call to "call" pseudoinstruction 2018-04-25 14:19:12 +00:00
float-select-fcmp.ll [RISCV] Codegen support for RV32F floating point comparison operations 2018-03-21 15:11:02 +00:00
fp128.ll [RISCV] Expand function call to "call" pseudoinstruction 2018-04-25 14:19:12 +00:00
frame.ll [RISCV] Expand function call to "call" pseudoinstruction 2018-04-25 14:19:12 +00:00
frameaddr-returnaddr.ll [RISCV] Expand function call to "call" pseudoinstruction 2018-04-25 14:19:12 +00:00
get-setcc-result-type.ll [RISCV] Define getSetCCResultType for setting vector setCC type 2018-02-02 02:43:18 +00:00
i32-icmp.ll [RISCV] Implement frame pointer elimination 2018-01-18 11:34:02 +00:00
imm-cse.ll [RISCV] Add imm-cse.ll test case 2018-04-18 20:25:07 +00:00
imm.ll [RISCV] Introduce pattern for materialising immediates with 0 for lower 12 bits 2018-04-18 20:34:23 +00:00
indirectbr.ll [RISCV] Implement frame pointer elimination 2018-01-18 11:34:02 +00:00
init-array.ll [RISCV] Use init_array instead of ctors for RISCV target, by default 2018-03-24 18:37:19 +00:00
inline-asm.ll [RISCV] Peephole optimisation for load/store of global values or constant addresses 2018-03-19 11:54:28 +00:00
jumptable.ll [RISCV] Implement frame pointer elimination 2018-01-18 11:34:02 +00:00
large-stack.ll [RISCV] Implement frame pointer elimination 2018-01-18 11:34:02 +00:00
lit.local.cfg
…
mem.ll [RISCV] Peephole optimisation for load/store of global values or constant addresses 2018-03-19 11:54:28 +00:00
mul.ll [RISCV] Expand function call to "call" pseudoinstruction 2018-04-25 14:19:12 +00:00
rem.ll [RISCV] Expand function call to "call" pseudoinstruction 2018-04-25 14:19:12 +00:00
rotl-rotr.ll [RISCV] Implement frame pointer elimination 2018-01-18 11:34:02 +00:00
select-cc.ll [RISCV] Implement frame pointer elimination 2018-01-18 11:34:02 +00:00
sext-zext-trunc.ll [RISCV] Implement frame pointer elimination 2018-01-18 11:34:02 +00:00
shifts.ll [RISCV] Expand function call to "call" pseudoinstruction 2018-04-25 14:19:12 +00:00
vararg.ll [RISCV] Expand function call to "call" pseudoinstruction 2018-04-25 14:19:12 +00:00
wide-mem.ll [RISCV] Peephole optimisation for load/store of global values or constant addresses 2018-03-19 11:54:28 +00:00