forked from OSchip/llvm-project
30 lines
945 B
LLVM
30 lines
945 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=aarch64-- | FileCheck %s
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define <4 x i32> @sextbool_add_vector(<4 x i32> %c1, <4 x i32> %c2, <4 x i32> %x) {
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; CHECK-LABEL: sextbool_add_vector:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cmeq v0.4s, v0.4s, v1.4s
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; CHECK-NEXT: add v0.4s, v2.4s, v0.4s
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; CHECK-NEXT: ret
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%c = icmp eq <4 x i32> %c1, %c2
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%b = sext <4 x i1> %c to <4 x i32>
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%s = add <4 x i32> %x, %b
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ret <4 x i32> %s
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}
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define <4 x i32> @zextbool_sub_vector(<4 x i32> %c1, <4 x i32> %c2, <4 x i32> %x) {
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; CHECK-LABEL: zextbool_sub_vector:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cmeq v0.4s, v0.4s, v1.4s
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; CHECK-NEXT: movi v1.4s, #1
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; CHECK-NEXT: and v0.16b, v0.16b, v1.16b
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; CHECK-NEXT: sub v0.4s, v2.4s, v0.4s
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; CHECK-NEXT: ret
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%c = icmp eq <4 x i32> %c1, %c2
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%b = zext <4 x i1> %c to <4 x i32>
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%s = sub <4 x i32> %x, %b
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ret <4 x i32> %s
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}
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