forked from OSchip/llvm-project
%shr = lshr i64 %key, 3 %0 = load i64* %val, align 8 %sub = add i64 %0, -1 %and = and i64 %sub, %shr ret i64 %and to: %shr = lshr i64 %key, 3 %0 = load i64* %val, align 8 %sub = add i64 %0, 2305843009213693951 %and = and i64 %sub, %shr ret i64 %and The demanded bit optimization is actually a pessimization because add -1 would be codegen'ed as a sub 1. Teach the demanded constant shrinking optimization to check for negated constant to make sure it is actually reducing the width of the constant. rdar://11793464 llvm-svn: 160101 |
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| .. | ||
| CMakeLists.txt | ||
| InstCombine.h | ||
| InstCombineAddSub.cpp | ||
| InstCombineAndOrXor.cpp | ||
| InstCombineCalls.cpp | ||
| InstCombineCasts.cpp | ||
| InstCombineCompares.cpp | ||
| InstCombineLoadStoreAlloca.cpp | ||
| InstCombineMulDivRem.cpp | ||
| InstCombinePHI.cpp | ||
| InstCombineSelect.cpp | ||
| InstCombineShifts.cpp | ||
| InstCombineSimplifyDemanded.cpp | ||
| InstCombineVectorOps.cpp | ||
| InstCombineWorklist.h | ||
| InstructionCombining.cpp | ||
| LLVMBuild.txt | ||
| Makefile | ||