forked from OSchip/llvm-project
208 lines
9.7 KiB
C++
208 lines
9.7 KiB
C++
//===-- MipsMCCodeEmitter.h - Convert Mips Code to Machine Code -----------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines the MipsMCCodeEmitter class.
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//
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//===----------------------------------------------------------------------===//
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//
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#ifndef LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSMCCODEEMITTER_H
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#define LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSMCCODEEMITTER_H
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#include "llvm/MC/MCCodeEmitter.h"
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#include "llvm/Support/DataTypes.h"
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using namespace llvm;
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namespace llvm {
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class MCContext;
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class MCExpr;
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class MCInst;
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class MCInstrInfo;
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class MCFixup;
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class MCOperand;
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class MCSubtargetInfo;
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class raw_ostream;
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class MipsMCCodeEmitter : public MCCodeEmitter {
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MipsMCCodeEmitter(const MipsMCCodeEmitter &) LLVM_DELETED_FUNCTION;
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void operator=(const MipsMCCodeEmitter &) LLVM_DELETED_FUNCTION;
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const MCInstrInfo &MCII;
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MCContext &Ctx;
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bool IsLittleEndian;
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bool isMicroMips(const MCSubtargetInfo &STI) const;
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public:
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MipsMCCodeEmitter(const MCInstrInfo &mcii, MCContext &Ctx_, bool IsLittle)
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: MCII(mcii), Ctx(Ctx_), IsLittleEndian(IsLittle) {}
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~MipsMCCodeEmitter() {}
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void EmitByte(unsigned char C, raw_ostream &OS) const;
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void EmitInstruction(uint64_t Val, unsigned Size, const MCSubtargetInfo &STI,
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raw_ostream &OS) const;
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void EncodeInstruction(const MCInst &MI, raw_ostream &OS,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const override;
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// getBinaryCodeForInstr - TableGen'erated function for getting the
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// binary encoding for an instruction.
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uint64_t getBinaryCodeForInstr(const MCInst &MI,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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// getJumpTargetOpValue - Return binary encoding of the jump
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// target operand. If the machine operand requires relocation,
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// record the relocation and return zero.
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unsigned getJumpTargetOpValue(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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// getBranchJumpOpValueMM - Return binary encoding of the microMIPS jump
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// target operand. If the machine operand requires relocation,
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// record the relocation and return zero.
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unsigned getJumpTargetOpValueMM(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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// getUImm5Lsl2Encoding - Return binary encoding of the microMIPS jump
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// target operand.
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unsigned getUImm5Lsl2Encoding(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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unsigned getSImm3Lsa2Value(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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unsigned getUImm6Lsl2Encoding(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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// getSImm9AddiuspValue - Return binary encoding of the microMIPS addiusp
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// instruction immediate operand.
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unsigned getSImm9AddiuspValue(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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// getBranchTargetOpValue - Return binary encoding of the branch
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// target operand. If the machine operand requires relocation,
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// record the relocation and return zero.
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unsigned getBranchTargetOpValue(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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// getBranchTargetOpValue - Return binary encoding of the microMIPS branch
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// target operand. If the machine operand requires relocation,
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// record the relocation and return zero.
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unsigned getBranchTargetOpValueMM(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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// getBranchTarget21OpValue - Return binary encoding of the branch
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// offset operand. If the machine operand requires relocation,
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// record the relocation and return zero.
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unsigned getBranchTarget21OpValue(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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// getBranchTarget26OpValue - Return binary encoding of the branch
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// offset operand. If the machine operand requires relocation,
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// record the relocation and return zero.
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unsigned getBranchTarget26OpValue(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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// getJumpOffset16OpValue - Return binary encoding of the jump
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// offset operand. If the machine operand requires relocation,
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// record the relocation and return zero.
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unsigned getJumpOffset16OpValue(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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// getMachineOpValue - Return binary encoding of operand. If the machin
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// operand requires relocation, record the relocation and return zero.
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unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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unsigned getMSAMemEncoding(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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unsigned getMemEncoding(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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unsigned getMemEncodingMMImm4(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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unsigned getMemEncodingMMImm4Lsl1(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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unsigned getMemEncodingMMImm4Lsl2(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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unsigned getMemEncodingMMSPImm5Lsl2(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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unsigned getMemEncodingMMImm12(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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unsigned getMemEncodingMMImm4sp(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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unsigned getSizeExtEncoding(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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unsigned getSizeInsEncoding(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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// getLSAImmEncoding - Return binary encoding of LSA immediate.
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unsigned getLSAImmEncoding(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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unsigned getSimm19Lsl2Encoding(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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unsigned getSimm18Lsl3Encoding(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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unsigned getUImm3Mod8Encoding(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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unsigned getUImm4AndValue(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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unsigned getRegisterPairOpValue(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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unsigned getExprOpValue(const MCExpr *Expr, SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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unsigned getRegisterListOpValue(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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unsigned getRegisterListOpValue16(const MCInst &MI, unsigned OpNo,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const;
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}; // class MipsMCCodeEmitter
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} // namespace llvm.
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#endif
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