llvm-project/llvm/lib/CodeGen/SelectionDAG
Nemanja Ivanovic 4821411347 [DAGCombine] Fix splitting indexed loads in ForwardStoreValueToDirectLoad()
In DAGCombiner::visitLOAD() we perform some checks before breaking up an indexed
load. However, we don't do the same checking in ForwardStoreValueToDirectLoad()
which can lead to failures later during combining
(see: https://bugs.llvm.org/show_bug.cgi?id=45301).

This patch just adds the same checks to this function as well.

Fixes: https://bugs.llvm.org/show_bug.cgi?id=45301

Differential revision: https://reviews.llvm.org/D76778
2020-03-27 18:03:47 -05:00
..
CMakeLists.txt [cmake] Explicitly mark libraries defined in lib/ as "Component Libraries" 2019-11-21 10:48:08 -08:00
DAGCombiner.cpp [DAGCombine] Fix splitting indexed loads in ForwardStoreValueToDirectLoad() 2020-03-27 18:03:47 -05:00
FastISel.cpp [SelDag] Add FREEZE 2020-03-24 23:04:58 +09:00
FunctionLoweringInfo.cpp [Alignment][NFC] Use TFL::getStackAlign() 2020-03-23 13:48:29 +01:00
InstrEmitter.cpp Reland "[WebAssembly][InstrEmitter] Foundation for multivalue call lowering" 2020-02-18 13:49:46 -08:00
InstrEmitter.h [SelectionDAG] Enhance the simplification of `copyto` from `implicit-def`. 2019-05-27 18:26:29 +00:00
LLVMBuild.txt
LegalizeDAG.cpp No longer generate calls to *_finite 2020-02-28 10:07:37 +01:00
LegalizeFloatTypes.cpp [SelectionDAG] Don't crash when freezing illegal float types 2020-03-24 19:45:19 +01:00
LegalizeIntegerTypes.cpp [SelDag] Add FREEZE 2020-03-24 23:04:58 +09:00
LegalizeTypes.cpp [LegalizeTypes][ARM][AArch64][PowerPC][RISCV][X86] Use BUILD_PAIR to return expanded integer results from ReplaceNodeResults instead of just returning two results. 2020-02-08 09:52:31 -08:00
LegalizeTypes.h [SelDag] Add FREEZE 2020-03-24 23:04:58 +09:00
LegalizeTypesGeneric.cpp [SelDag] Add FREEZE 2020-03-24 23:04:58 +09:00
LegalizeVectorOps.cpp [SDAG] Add SDNode::values() = make_range(values_begin(), values_end()) 2020-02-26 12:07:38 -06:00
LegalizeVectorTypes.cpp [Legalizer] Fix some flags miss in vector results 2020-03-26 22:01:19 +08:00
ResourcePriorityQueue.cpp
SDNodeDbgValue.h
ScheduleDAGFast.cpp Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Register as started by r367614. NFC 2019-08-01 23:27:28 +00:00
ScheduleDAGRRList.cpp [ScheduleDAG] When a node is cloned, add an edge between the nodes. 2019-10-04 19:51:40 +00:00
ScheduleDAGSDNodes.cpp [CallSiteInfo] Enable the call site info only for -g + optimizations 2020-03-09 12:12:44 +01:00
ScheduleDAGSDNodes.h Prune Analysis includes from SelectionDAG.h 2019-10-19 01:07:48 +00:00
ScheduleDAGVLIW.cpp Prune Analysis includes from SelectionDAG.h 2019-10-19 01:07:48 +00:00
SelectionDAG.cpp [DAGCombine] Add basic optimizations for FREEZE in SelDag 2020-03-27 12:20:39 +09:00
SelectionDAGAddressAnalysis.cpp Prune a LegacyDivergenceAnalysis and MachineLoopInfo include each 2019-10-19 01:31:09 +00:00
SelectionDAGBuilder.cpp [X86] Move combineLoopMAddPattern and combineLoopSADPattern to an IR pass before SelecitonDAG. 2020-03-26 14:10:20 -07:00
SelectionDAGBuilder.h [FPEnv] Fix chain handling regression after 04a8696 2020-01-14 14:10:57 +01:00
SelectionDAGDumper.cpp [X86] Move combineLoopMAddPattern and combineLoopSADPattern to an IR pass before SelecitonDAG. 2020-03-26 14:10:20 -07:00
SelectionDAGISel.cpp [SelDag] Add FREEZE 2020-03-24 23:04:58 +09:00
SelectionDAGPrinter.cpp Make llvm::StringRef to std::string conversions explicit. 2020-01-28 23:25:25 +01:00
SelectionDAGTargetInfo.cpp
StatepointLowering.cpp Remove unused variable. 2020-03-12 08:42:57 +01:00
StatepointLowering.h [FastISel] Fix crash for gc.relocate lowring 2019-04-05 05:41:08 +00:00
TargetLowering.cpp GlobalISel: Add computeKnownBitsForTargetInstr 2020-03-23 15:02:30 -04:00