forked from OSchip/llvm-project
136 lines
7.5 KiB
LLVM
136 lines
7.5 KiB
LLVM
; RUN: opt -S -mtriple=amdgcn-unknown-amdhsa -mcpu=kaveri -amdgpu-promote-alloca < %s | FileCheck %s
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target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5"
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; CHECK-LABEL: @lds_promoted_alloca_select_invalid_pointer_operand(
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; CHECK: %alloca = alloca i32
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; CHECK: select i1 undef, i32 addrspace(5)* undef, i32 addrspace(5)* %alloca
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define amdgpu_kernel void @lds_promoted_alloca_select_invalid_pointer_operand() #0 {
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%alloca = alloca i32, align 4, addrspace(5)
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%select = select i1 undef, i32 addrspace(5)* undef, i32 addrspace(5)* %alloca
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store i32 0, i32 addrspace(5)* %select, align 4
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ret void
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}
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; CHECK-LABEL: @lds_promote_alloca_select_two_derived_pointers(
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; CHECK: [[ARRAYGEP:%[0-9]+]] = getelementptr inbounds [256 x [16 x i32]], [256 x [16 x i32]] addrspace(3)* @lds_promote_alloca_select_two_derived_pointers.alloca, i32 0, i32 %{{[0-9]+}}
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; CHECK: %ptr0 = getelementptr inbounds [16 x i32], [16 x i32] addrspace(3)* [[ARRAYGEP]], i32 0, i32 %a
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; CHECK: %ptr1 = getelementptr inbounds [16 x i32], [16 x i32] addrspace(3)* [[ARRAYGEP]], i32 0, i32 %b
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; CHECK: %select = select i1 undef, i32 addrspace(3)* %ptr0, i32 addrspace(3)* %ptr1
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; CHECK: store i32 0, i32 addrspace(3)* %select, align 4
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define amdgpu_kernel void @lds_promote_alloca_select_two_derived_pointers(i32 %a, i32 %b) #0 {
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%alloca = alloca [16 x i32], align 4, addrspace(5)
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%ptr0 = getelementptr inbounds [16 x i32], [16 x i32] addrspace(5)* %alloca, i32 0, i32 %a
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%ptr1 = getelementptr inbounds [16 x i32], [16 x i32] addrspace(5)* %alloca, i32 0, i32 %b
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%select = select i1 undef, i32 addrspace(5)* %ptr0, i32 addrspace(5)* %ptr1
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store i32 0, i32 addrspace(5)* %select, align 4
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ret void
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}
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; FIXME: This should be promotable but requires knowing that both will be promoted first.
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; CHECK-LABEL: @lds_promote_alloca_select_two_allocas(
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; CHECK: %alloca0 = alloca i32, i32 16, align 4
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; CHECK: %alloca1 = alloca i32, i32 16, align 4
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; CHECK: %ptr0 = getelementptr inbounds i32, i32 addrspace(5)* %alloca0, i32 %a
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; CHECK: %ptr1 = getelementptr inbounds i32, i32 addrspace(5)* %alloca1, i32 %b
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; CHECK: %select = select i1 undef, i32 addrspace(5)* %ptr0, i32 addrspace(5)* %ptr1
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define amdgpu_kernel void @lds_promote_alloca_select_two_allocas(i32 %a, i32 %b) #0 {
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%alloca0 = alloca i32, i32 16, align 4, addrspace(5)
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%alloca1 = alloca i32, i32 16, align 4, addrspace(5)
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%ptr0 = getelementptr inbounds i32, i32 addrspace(5)* %alloca0, i32 %a
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%ptr1 = getelementptr inbounds i32, i32 addrspace(5)* %alloca1, i32 %b
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%select = select i1 undef, i32 addrspace(5)* %ptr0, i32 addrspace(5)* %ptr1
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store i32 0, i32 addrspace(5)* %select, align 4
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ret void
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}
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; TODO: Maybe this should be canonicalized to select on the constant and GEP after.
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; CHECK-LABEL: @lds_promote_alloca_select_two_derived_constant_pointers(
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; CHECK: [[ARRAYGEP:%[0-9]+]] = getelementptr inbounds [256 x [16 x i32]], [256 x [16 x i32]] addrspace(3)* @lds_promote_alloca_select_two_derived_constant_pointers.alloca, i32 0, i32 %{{[0-9]+}}
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; CHECK: %ptr0 = getelementptr inbounds [16 x i32], [16 x i32] addrspace(3)* [[ARRAYGEP]], i32 0, i32 1
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; CHECK: %ptr1 = getelementptr inbounds [16 x i32], [16 x i32] addrspace(3)* [[ARRAYGEP]], i32 0, i32 3
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; CHECK: %select = select i1 undef, i32 addrspace(3)* %ptr0, i32 addrspace(3)* %ptr1
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; CHECK: store i32 0, i32 addrspace(3)* %select, align 4
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define amdgpu_kernel void @lds_promote_alloca_select_two_derived_constant_pointers() #0 {
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%alloca = alloca [16 x i32], align 4, addrspace(5)
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%ptr0 = getelementptr inbounds [16 x i32], [16 x i32] addrspace(5)* %alloca, i32 0, i32 1
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%ptr1 = getelementptr inbounds [16 x i32], [16 x i32] addrspace(5)* %alloca, i32 0, i32 3
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%select = select i1 undef, i32 addrspace(5)* %ptr0, i32 addrspace(5)* %ptr1
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store i32 0, i32 addrspace(5)* %select, align 4
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ret void
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}
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; CHECK-LABEL: @lds_promoted_alloca_select_input_select(
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; CHECK: getelementptr inbounds [256 x [16 x i32]], [256 x [16 x i32]] addrspace(3)* @lds_promoted_alloca_select_input_select.alloca, i32 0, i32 %{{[0-9]+}}
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; CHECK: %ptr0 = getelementptr inbounds [16 x i32], [16 x i32] addrspace(3)* %{{[0-9]+}}, i32 0, i32 %a
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; CHECK: %ptr1 = getelementptr inbounds [16 x i32], [16 x i32] addrspace(3)* %{{[0-9]+}}, i32 0, i32 %b
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; CHECK: %ptr2 = getelementptr inbounds [16 x i32], [16 x i32] addrspace(3)* %{{[0-9]+}}, i32 0, i32 %c
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; CHECK: %select0 = select i1 undef, i32 addrspace(3)* %ptr0, i32 addrspace(3)* %ptr1
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; CHECK: %select1 = select i1 undef, i32 addrspace(3)* %select0, i32 addrspace(3)* %ptr2
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; CHECK: store i32 0, i32 addrspace(3)* %select1, align 4
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define amdgpu_kernel void @lds_promoted_alloca_select_input_select(i32 %a, i32 %b, i32 %c) #0 {
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%alloca = alloca [16 x i32], align 4, addrspace(5)
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%ptr0 = getelementptr inbounds [16 x i32], [16 x i32] addrspace(5)* %alloca, i32 0, i32 %a
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%ptr1 = getelementptr inbounds [16 x i32], [16 x i32] addrspace(5)* %alloca, i32 0, i32 %b
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%ptr2 = getelementptr inbounds [16 x i32], [16 x i32] addrspace(5)* %alloca, i32 0, i32 %c
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%select0 = select i1 undef, i32 addrspace(5)* %ptr0, i32 addrspace(5)* %ptr1
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%select1 = select i1 undef, i32 addrspace(5)* %select0, i32 addrspace(5)* %ptr2
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store i32 0, i32 addrspace(5)* %select1, align 4
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ret void
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}
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define amdgpu_kernel void @lds_promoted_alloca_select_input_phi(i32 %a, i32 %b, i32 %c) #0 {
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entry:
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%alloca = alloca [16 x i32], align 4, addrspace(5)
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%ptr0 = getelementptr inbounds [16 x i32], [16 x i32] addrspace(5)* %alloca, i32 0, i32 %a
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%ptr1 = getelementptr inbounds [16 x i32], [16 x i32] addrspace(5)* %alloca, i32 0, i32 %b
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store i32 0, i32 addrspace(5)* %ptr0
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br i1 undef, label %bb1, label %bb2
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bb1:
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%ptr2 = getelementptr inbounds [16 x i32], [16 x i32] addrspace(5)* %alloca, i32 0, i32 %c
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%select0 = select i1 undef, i32 addrspace(5)* undef, i32 addrspace(5)* %ptr2
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store i32 0, i32 addrspace(5)* %ptr1
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br label %bb2
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bb2:
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%phi.ptr = phi i32 addrspace(5)* [ %ptr0, %entry ], [ %select0, %bb1 ]
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%select1 = select i1 undef, i32 addrspace(5)* %phi.ptr, i32 addrspace(5)* %ptr1
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store i32 0, i32 addrspace(5)* %select1, align 4
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ret void
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}
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; CHECK-LABEL: @select_null_rhs(
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; CHECK-NOT: alloca
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; CHECK: select i1 %tmp2, double addrspace(3)* %{{[0-9]+}}, double addrspace(3)* null
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define amdgpu_kernel void @select_null_rhs(double addrspace(1)* nocapture %arg, i32 %arg1) #1 {
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bb:
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%tmp = alloca double, align 8, addrspace(5)
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store double 0.000000e+00, double addrspace(5)* %tmp, align 8
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%tmp2 = icmp eq i32 %arg1, 0
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%tmp3 = select i1 %tmp2, double addrspace(5)* %tmp, double addrspace(5)* null
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store double 1.000000e+00, double addrspace(5)* %tmp3, align 8
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%tmp4 = load double, double addrspace(5)* %tmp, align 8
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store double %tmp4, double addrspace(1)* %arg
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ret void
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}
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; CHECK-LABEL: @select_null_lhs(
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; CHECK-NOT: alloca
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; CHECK: select i1 %tmp2, double addrspace(3)* null, double addrspace(3)* %{{[0-9]+}}
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define amdgpu_kernel void @select_null_lhs(double addrspace(1)* nocapture %arg, i32 %arg1) #1 {
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bb:
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%tmp = alloca double, align 8, addrspace(5)
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store double 0.000000e+00, double addrspace(5)* %tmp, align 8
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%tmp2 = icmp eq i32 %arg1, 0
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%tmp3 = select i1 %tmp2, double addrspace(5)* null, double addrspace(5)* %tmp
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store double 1.000000e+00, double addrspace(5)* %tmp3, align 8
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%tmp4 = load double, double addrspace(5)* %tmp, align 8
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store double %tmp4, double addrspace(1)* %arg
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ret void
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}
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attributes #0 = { norecurse nounwind "amdgpu-waves-per-eu"="1,1" }
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attributes #1 = { norecurse nounwind }
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