llvm-project/llvm/test/Transforms/LoopVectorize/X86
Michael Kruse 978ba61536 Introduce llvm.loop.parallel_accesses and llvm.access.group metadata.
The current llvm.mem.parallel_loop_access metadata has a problem in that
it uses LoopIDs. LoopID unfortunately is not loop identifier. It is
neither unique (there's even a regression test assigning the some LoopID
to multiple loops; can otherwise happen if passes such as LoopVersioning
make copies of entire loops) nor persistent (every time a property is
removed/added from a LoopID's MDNode, it will also receive a new LoopID;
this happens e.g. when calling Loop::setLoopAlreadyUnrolled()).
Since most loop transformation passes change the loop attributes (even
if it just to mark that a loop should not be processed again as
llvm.loop.isvectorized does, for the versioned and unversioned loop),
the parallel access information is lost for any subsequent pass.

This patch unlinks LoopIDs and parallel accesses.
llvm.mem.parallel_loop_access metadata on instruction is replaced by
llvm.access.group metadata. llvm.access.group points to a distinct
MDNode with no operands (avoiding the problem to ever need to add/remove
operands), called "access group". Alternatively, it can point to a list
of access groups. The LoopID then has an attribute
llvm.loop.parallel_accesses with all the access groups that are parallel
(no dependencies carries by this loop).

This intentionally avoid any kind of "ID". Loops that are clones/have
their attributes modifies retain the llvm.loop.parallel_accesses
attribute. Access instructions that a cloned point to the same access
group. It is not necessary for each access to have it's own "ID" MDNode,
but those memory access instructions with the same behavior can be
grouped together.

The behavior of llvm.mem.parallel_loop_access is not changed by this
patch, but should be considered deprecated.

Differential Revision: https://reviews.llvm.org/D52116

llvm-svn: 349725
2018-12-20 04:58:07 +00:00
..
already-vectorized.ll
assume.ll
avx1.ll
avx512.ll
consecutive-ptr-cg-bug.ll
consecutive-ptr-uniforms.ll
constant-fold.ll [LV] Do not create SCEVs on broken IR in emitTransformedIndex. PR39160 2018-10-08 05:46:29 +00:00
constant-vector-operand.ll
conversion-cost.ll
cost-model.ll
float-induction-x86.ll
force-ifcvt.ll Introduce llvm.loop.parallel_accesses and llvm.access.group metadata. 2018-12-20 04:58:07 +00:00
fp32_to_uint32-cost-model.ll
fp64_to_uint32-cost-model.ll
fp_to_sint8-cost-model.ll
funclet.ll
gather-cost.ll
gather-vs-interleave.ll [X86][LoopVectorize] Replace -mcpu=skylake-avx512 with -mattr=avx512f in some tests that failed when experimenting with defaulting to -mprefer-vector-width=256 for skylake-avx512. 2018-12-01 01:38:44 +00:00
gather_scatter.ll [CostModel] Add more realistic SK_InsertSubvector generic costs. 2018-11-12 15:20:24 +00:00
gcc-examples.ll
illegal-parallel-loop-uniform-write.ll [LoopVectorize] auto-generate complete checks; NFC 2018-12-18 22:23:04 +00:00
imprecise-through-phis.ll
int128_no_gather.ll
interleaving.ll
invariant-load-gather.ll [X86][LoopVectorize] Replace -mcpu=skylake-avx512 with -mattr=avx512f in some tests that failed when experimenting with defaulting to -mprefer-vector-width=256 for skylake-avx512. 2018-12-01 01:38:44 +00:00
invariant-store-vectorization.ll [X86][LoopVectorize] Replace -mcpu=skylake-avx512 with -mattr=avx512f in some tests that failed when experimenting with defaulting to -mprefer-vector-width=256 for skylake-avx512. 2018-12-01 01:38:44 +00:00
lit.local.cfg
masked_load_store.ll [InstCombine] reverse 'trunc X to <N x i1>' canonicalization; 2nd try 2018-10-10 20:47:46 +00:00
max-mstore.ll
metadata-enable.ll
min-trip-count-switch.ll
mul_slm_16bit.ll
no-vector.ll
no_fpmath.ll [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00
no_fpmath_with_hotness.ll [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00
optsize.ll [LV] Avoid vectorizing loops under opt for size that involve SCEV checks 2018-11-02 09:16:12 +00:00
parallel-loops-after-reg2mem.ll Introduce llvm.loop.parallel_accesses and llvm.access.group metadata. 2018-12-20 04:58:07 +00:00
parallel-loops.ll Introduce llvm.loop.parallel_accesses and llvm.access.group metadata. 2018-12-20 04:58:07 +00:00
powof2div.ll
pr23997.ll [X86][CET] Changing -fcf-protection behavior to comply with gcc (LLVM part) 2018-05-18 11:58:25 +00:00
pr34438.ll Introduce llvm.loop.parallel_accesses and llvm.access.group metadata. 2018-12-20 04:58:07 +00:00
pr35432.ll Revert "[SCEV][NFC] Check NoWrap flags before lexicographical comparison of SCEVs" 2018-08-27 21:41:37 +00:00
pr36524.ll
pr39160.ll [LV] Move test for r343954 into x86 subdirectory 2018-10-09 22:40:04 +00:00
propagate-metadata.ll
ptr-indvar-crash.ll
rauw-bug.ll
reduction-crash.ll
reduction-small-size.ll
redundant-vf2-cost.ll Move redundant-vf2-cost.ll test to X86 directory 2018-06-15 18:46:03 +00:00
reg-usage-debug.ll [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00
reg-usage.ll
register-assumption.ll
scatter_crash.ll
slm-no-vectorize.ll
small-size.ll [LV] Fold tail by masking to vectorize loops of arbitrary trip count under opt for size 2018-10-18 15:03:15 +00:00
strided_load_cost.ll
struct-store.ll
svml-calls-finite.ll
svml-calls.ll [TargetLibraryInfo] add mappings from LLVM sin/cos intrinsics to SVML calls 2018-06-07 18:21:24 +00:00
tripcount.ll
uint64_to_fp64-cost-model.ll [CostModel][X86] Add realistic vXi64 uitofp vXf64 costs 2018-10-25 13:06:20 +00:00
uniform-phi.ll [LV] First order recurrence phis should not be treated as uniform 2018-09-04 22:12:23 +00:00
uniform_load.ll
uniformshift.ll
unroll-pm.ll
unroll-small-loops.ll
unroll_selection.ll
veclib-calls.ll
vect.omp.force.ll Introduce llvm.loop.parallel_accesses and llvm.access.group metadata. 2018-12-20 04:58:07 +00:00
vect.omp.force.small-tc.ll Introduce llvm.loop.parallel_accesses and llvm.access.group metadata. 2018-12-20 04:58:07 +00:00
vector-scalar-select-cost.ll
vector_max_bandwidth.ll Introduce llvm.loop.parallel_accesses and llvm.access.group metadata. 2018-12-20 04:58:07 +00:00
vector_ptr_load_store.ll
vectorization-remarks-loopid-dbg.ll [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00
vectorization-remarks-missed.ll [Unroll/UnrollAndJam/Vectorizer/Distribute] Add followup loop attributes. 2018-12-12 17:32:52 +00:00
vectorization-remarks-profitable.ll [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00
vectorization-remarks.ll [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00
vectorize-only-for-real.ll
x86-interleaved-accesses-masked-group.ll [LV] Support vectorization of interleave-groups that require an epilog under 2018-10-31 09:57:56 +00:00
x86-pr39099.ll [IAI,LV] Avoid creating interleave-groups for predicated accesse 2018-10-07 06:57:25 +00:00
x86-predication.ll
x86_fp80-vector-store.ll