forked from OSchip/llvm-project
121 lines
2.9 KiB
C++
121 lines
2.9 KiB
C++
//===-- R600MachineScheduler.h - R600 Scheduler Interface -*- C++ -*-------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file
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/// \brief R600 Machine Scheduler interface
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//
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//===----------------------------------------------------------------------===//
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#ifndef R600MACHINESCHEDULER_H_
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#define R600MACHINESCHEDULER_H_
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#include "R600InstrInfo.h"
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#include "llvm/CodeGen/MachineScheduler.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/ADT/PriorityQueue.h"
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using namespace llvm;
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namespace llvm {
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class CompareSUnit {
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public:
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bool operator()(const SUnit *S1, const SUnit *S2) {
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return S1->getDepth() > S2->getDepth();
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}
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};
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class R600SchedStrategy : public MachineSchedStrategy {
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const ScheduleDAGMI *DAG;
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const R600InstrInfo *TII;
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const R600RegisterInfo *TRI;
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MachineRegisterInfo *MRI;
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enum InstQueue {
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QAlu = 1,
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QFetch = 2,
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QOther = 4
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};
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enum InstKind {
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IDAlu,
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IDFetch,
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IDOther,
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IDLast
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};
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enum AluKind {
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AluAny,
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AluT_X,
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AluT_Y,
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AluT_Z,
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AluT_W,
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AluT_XYZW,
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AluDiscarded, // LLVM Instructions that are going to be eliminated
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AluLast
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};
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ReadyQueue *Available[IDLast], *Pending[IDLast];
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std::multiset<SUnit *, CompareSUnit> AvailableAlus[AluLast];
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InstKind CurInstKind;
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int CurEmitted;
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InstKind NextInstKind;
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int InstKindLimit[IDLast];
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int OccupedSlotsMask;
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public:
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R600SchedStrategy() :
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DAG(0), TII(0), TRI(0), MRI(0) {
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Available[IDAlu] = new ReadyQueue(QAlu, "AAlu");
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Available[IDFetch] = new ReadyQueue(QFetch, "AFetch");
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Available[IDOther] = new ReadyQueue(QOther, "AOther");
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Pending[IDAlu] = new ReadyQueue(QAlu<<4, "PAlu");
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Pending[IDFetch] = new ReadyQueue(QFetch<<4, "PFetch");
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Pending[IDOther] = new ReadyQueue(QOther<<4, "POther");
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}
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virtual ~R600SchedStrategy() {
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for (unsigned I = 0; I < IDLast; ++I) {
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delete Available[I];
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delete Pending[I];
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}
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}
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virtual void initialize(ScheduleDAGMI *dag);
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virtual SUnit *pickNode(bool &IsTopNode);
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virtual void schedNode(SUnit *SU, bool IsTopNode);
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virtual void releaseTopNode(SUnit *SU);
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virtual void releaseBottomNode(SUnit *SU);
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private:
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std::vector<MachineInstr *> InstructionsGroupCandidate;
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int getInstKind(SUnit *SU);
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bool regBelongsToClass(unsigned Reg, const TargetRegisterClass *RC) const;
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AluKind getAluKind(SUnit *SU) const;
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void LoadAlu();
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bool isAvailablesAluEmpty() const;
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SUnit *AttemptFillSlot (unsigned Slot);
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void PrepareNextSlot();
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SUnit *PopInst(std::multiset<SUnit *, CompareSUnit> &Q);
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void AssignSlot(MachineInstr *MI, unsigned Slot);
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SUnit* pickAlu();
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SUnit* pickOther(int QID);
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void MoveUnits(ReadyQueue *QSrc, ReadyQueue *QDst);
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};
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} // namespace llvm
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#endif /* R600MACHINESCHEDULER_H_ */
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