Dmitry Preobrazhensky 2713495318 [AMDGPU][MC] Added support of 256- and 512-bit tuples of ttmp registers ... See bug 35561: https://bugs.llvm.org/show_bug.cgi?id=35561 This patch also affects implementation of SGPR and VGPR registers though changes are cosmetic. Reviewers: artem.tamazov, arsenm Differential Revision: https://reviews.llvm.org/D41437 llvm-svn: 321359		2017-12-22 15:18:06 +00:00
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AMDGPUAsmParser.cpp	[AMDGPU][MC] Added support of 256- and 512-bit tuples of ttmp registers	2017-12-22 15:18:06 +00:00
CMakeLists.txt	[AMDGPU] Using table-driven amd_kernel_code_t field parser in assembler.	2016-03-06 20:25:36 +00:00
LLVMBuild.txt	…