forked from OSchip/llvm-project
904343f879
Summary:
Patch by Marek Olsak and David Stuttard, both of AMD.
This adds a new amdgcn intrinsic supporting s.buffer.load, in particular
multiple dword variants. These are convenient to use from some front-end
implementations.
Also modified the existing llvm.SI.load.const intrinsic to common up the
underlying implementation.
This modification also requires that we can lower to non-uniform loads correctly
by splitting larger dword variants into sizes supported by the non-uniform
versions of the load.
V2: Addressed minor review comments.
V3: i1 glc is now i32 cachepolicy for consistency with buffer and
tbuffer intrinsics, plus fixed formatting issue.
V4: Added glc test.
Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D51098
Change-Id: I83a6e00681158bb243591a94a51c7baa445f169b
llvm-svn: 340684
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| .. | ||
| AArch64 | ||
| and_or.ll | ||
| atomics.ll | ||
| basic.ll | ||
| commute.ll | ||
| conditional.ll | ||
| const-speculation.ll | ||
| debuginfo-dce.ll | ||
| edge.ll | ||
| fence.ll | ||
| flags.ll | ||
| floatingpoint.ll | ||
| globalsaa-memoryssa.ll | ||
| guards.ll | ||
| instsimplify-dom.ll | ||
| int_sideeffect.ll | ||
| intrinsics.ll | ||
| invariant-loads.ll | ||
| invariant.start.ll | ||
| memoryssa.ll | ||
| pr33406.ll | ||
| read-reg.ll | ||
| readnone-mayunwind.ll | ||