forked from OSchip/llvm-project
				
			
		
			
				
	
	
		
			251 lines
		
	
	
		
			5.2 KiB
		
	
	
	
		
			LLVM
		
	
	
	
			
		
		
	
	
			251 lines
		
	
	
		
			5.2 KiB
		
	
	
	
		
			LLVM
		
	
	
	
| ; RUN: llc < %s -O0 -march=x86-64 -mcpu=corei7 -verify-machineinstrs | FileCheck %s --check-prefix X64
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| ; RUN: llc < %s -O0 -march=x86 -mcpu=corei7 -verify-machineinstrs | FileCheck %s --check-prefix X32
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| 
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| @sc8 = external global i8
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| 
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| define void @atomic_fetch_add8() nounwind {
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| ; X64:   atomic_fetch_add8
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| ; X32:   atomic_fetch_add8
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| entry:
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| ; 32-bit
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|   %t1 = atomicrmw add  i8* @sc8, i8 1 acquire
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| ; X64:       lock
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| ; X64:       incb
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| ; X32:       lock
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| ; X32:       incb
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|   %t2 = atomicrmw add  i8* @sc8, i8 3 acquire
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| ; X64:       lock
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| ; X64:       addb $3
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| ; X32:       lock
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| ; X32:       addb $3
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|   %t3 = atomicrmw add  i8* @sc8, i8 5 acquire
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| ; X64:       lock
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| ; X64:       xaddb
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| ; X32:       lock
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| ; X32:       xaddb
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|   %t4 = atomicrmw add  i8* @sc8, i8 %t3 acquire
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| ; X64:       lock
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| ; X64:       addb
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| ; X32:       lock
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| ; X32:       addb
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|   ret void
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| ; X64:       ret
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| ; X32:       ret
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| }
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| 
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| define void @atomic_fetch_sub8() nounwind {
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| ; X64:   atomic_fetch_sub8
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| ; X32:   atomic_fetch_sub8
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|   %t1 = atomicrmw sub  i8* @sc8, i8 1 acquire
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| ; X64:       lock
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| ; X64:       decb
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| ; X32:       lock
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| ; X32:       decb
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|   %t2 = atomicrmw sub  i8* @sc8, i8 3 acquire
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| ; X64:       lock
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| ; X64:       subb $3
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| ; X32:       lock
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| ; X32:       subb $3
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|   %t3 = atomicrmw sub  i8* @sc8, i8 5 acquire
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| ; X64:       lock
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| ; X64:       xaddb
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| ; X32:       lock
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| ; X32:       xaddb
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|   %t4 = atomicrmw sub  i8* @sc8, i8 %t3 acquire
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| ; X64:       lock
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| ; X64:       subb
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| ; X32:       lock
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| ; X32:       subb
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|   ret void
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| ; X64:       ret
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| ; X32:       ret
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| }
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| 
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| define void @atomic_fetch_and8() nounwind {
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| ; X64:   atomic_fetch_and8
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| ; X32:   atomic_fetch_and8
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|   %t1 = atomicrmw and  i8* @sc8, i8 3 acquire
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| ; X64:       lock
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| ; X64:       andb $3
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| ; X32:       lock
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| ; X32:       andb $3
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|   %t2 = atomicrmw and  i8* @sc8, i8 5 acquire
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| ; X64:       andb
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| ; X64:       lock
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| ; X64:       cmpxchgb
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| ; X32:       andb
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| ; X32:       lock
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| ; X32:       cmpxchgb
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|   %t3 = atomicrmw and  i8* @sc8, i8 %t2 acquire
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| ; X64:       lock
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| ; X64:       andb
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| ; X32:       lock
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| ; X32:       andb
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|   ret void
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| ; X64:       ret
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| ; X32:       ret
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| }
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| 
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| define void @atomic_fetch_or8() nounwind {
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| ; X64:   atomic_fetch_or8
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| ; X32:   atomic_fetch_or8
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|   %t1 = atomicrmw or   i8* @sc8, i8 3 acquire
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| ; X64:       lock
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| ; X64:       orb $3
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| ; X32:       lock
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| ; X32:       orb $3
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|   %t2 = atomicrmw or   i8* @sc8, i8 5 acquire
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| ; X64:       orb
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| ; X64:       lock
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| ; X64:       cmpxchgb
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| ; X32:       orb
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| ; X32:       lock
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| ; X32:       cmpxchgb
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|   %t3 = atomicrmw or   i8* @sc8, i8 %t2 acquire
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| ; X64:       lock
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| ; X64:       orb
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| ; X32:       lock
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| ; X32:       orb
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|   ret void
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| ; X64:       ret
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| ; X32:       ret
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| }
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| 
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| define void @atomic_fetch_xor8() nounwind {
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| ; X64:   atomic_fetch_xor8
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| ; X32:   atomic_fetch_xor8
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|   %t1 = atomicrmw xor  i8* @sc8, i8 3 acquire
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| ; X64:       lock
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| ; X64:       xorb $3
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| ; X32:       lock
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| ; X32:       xorb $3
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|   %t2 = atomicrmw xor  i8* @sc8, i8 5 acquire
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| ; X64:       xorb
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| ; X64:       lock
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| ; X64:       cmpxchgb
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| ; X32:       xorb
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| ; X32:       lock
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| ; X32:       cmpxchgb
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|   %t3 = atomicrmw xor  i8* @sc8, i8 %t2 acquire
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| ; X64:       lock
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| ; X64:       xorb
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| ; X32:       lock
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| ; X32:       xorb
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|   ret void
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| ; X64:       ret
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| ; X32:       ret
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| }
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| 
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| define void @atomic_fetch_nand8(i8 %x) nounwind {
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| ; X64:   atomic_fetch_nand8
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| ; X32:   atomic_fetch_nand8
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|   %t1 = atomicrmw nand i8* @sc8, i8 %x acquire
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| ; X64:       andb
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| ; X64:       notb
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| ; X64:       lock
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| ; X64:       cmpxchgb
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| ; X32:       andb
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| ; X32:       notb
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| ; X32:       lock
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| ; X32:       cmpxchgb
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|   ret void
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| ; X64:       ret
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| ; X32:       ret
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| }
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| 
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| define void @atomic_fetch_max8(i8 %x) nounwind {
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|   %t1 = atomicrmw max  i8* @sc8, i8 %x acquire
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| ; X64:       cmpb
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| ; X64:       cmov
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| ; X64:       lock
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| ; X64:       cmpxchgb
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| 
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| ; X32:       cmpb
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| ; X32:       cmov
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| ; X32:       lock
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| ; X32:       cmpxchgb
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|   ret void
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| ; X64:       ret
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| ; X32:       ret
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| }
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| 
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| define void @atomic_fetch_min8(i8 %x) nounwind {
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|   %t1 = atomicrmw min  i8* @sc8, i8 %x acquire
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| ; X64:       cmpb
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| ; X64:       cmov
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| ; X64:       lock
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| ; X64:       cmpxchgb
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| 
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| ; X32:       cmpb
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| ; X32:       cmov
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| ; X32:       lock
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| ; X32:       cmpxchgb
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|   ret void
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| ; X64:       ret
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| ; X32:       ret
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| }
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| 
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| define void @atomic_fetch_umax8(i8 %x) nounwind {
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|   %t1 = atomicrmw umax i8* @sc8, i8 %x acquire
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| ; X64:       cmpb
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| ; X64:       cmov
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| ; X64:       lock
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| ; X64:       cmpxchgb
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| 
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| ; X32:       cmpb
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| ; X32:       cmov
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| ; X32:       lock
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| ; X32:       cmpxchgb
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|   ret void
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| ; X64:       ret
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| ; X32:       ret
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| }
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| 
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| define void @atomic_fetch_umin8(i8 %x) nounwind {
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|   %t1 = atomicrmw umin i8* @sc8, i8 %x acquire
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| ; X64:       cmpb
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| ; X64:       cmov
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| ; X64:       lock
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| ; X64:       cmpxchgb
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| ; X32:       cmpb
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| ; X32:       cmov
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| ; X32:       lock
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| ; X32:       cmpxchgb
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|   ret void
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| ; X64:       ret
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| ; X32:       ret
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| }
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| 
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| define void @atomic_fetch_cmpxchg8() nounwind {
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|   %t1 = cmpxchg i8* @sc8, i8 0, i8 1 acquire
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| ; X64:       lock
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| ; X64:       cmpxchgb
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| ; X32:       lock
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| ; X32:       cmpxchgb
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|   ret void
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| ; X64:       ret
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| ; X32:       ret
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| }
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| 
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| define void @atomic_fetch_store8(i8 %x) nounwind {
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|   store atomic i8 %x, i8* @sc8 release, align 4
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| ; X64-NOT:   lock
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| ; X64:       movb
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| ; X32-NOT:   lock
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| ; X32:       movb
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|   ret void
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| ; X64:       ret
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| ; X32:       ret
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| }
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| 
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| define void @atomic_fetch_swap8(i8 %x) nounwind {
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|   %t1 = atomicrmw xchg i8* @sc8, i8 %x acquire
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| ; X64-NOT:   lock
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| ; X64:       xchgb
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| ; X32-NOT:   lock
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| ; X32:       xchgb
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|   ret void
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| ; X64:       ret
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| ; X32:       ret
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| }
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