forked from OSchip/llvm-project
155 lines
4.7 KiB
LLVM
155 lines
4.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=core-avx2 | FileCheck %s
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define i1 @try_cmpxchg(i128* %addr, i128 %desired, i128 %new) {
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; CHECK-LABEL: try_cmpxchg:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pushq %rbx
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: .cfi_offset %rbx, -16
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; CHECK-NEXT: movq %rcx, %rbx
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; CHECK-NEXT: movq %rsi, %rax
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; CHECK-NEXT: movq %r8, %rcx
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; CHECK-NEXT: lock cmpxchg16b (%rdi)
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; CHECK-NEXT: sete %al
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; CHECK-NEXT: popq %rbx
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; CHECK-NEXT: .cfi_def_cfa_offset 8
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; CHECK-NEXT: retq
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%pair = cmpxchg i128* %addr, i128 %desired, i128 %new seq_cst seq_cst
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%success = extractvalue { i128, i1 } %pair, 1
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ret i1 %success
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}
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define void @cmpxchg_flow(i128* %addr, i128 %desired, i128 %new) {
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; CHECK-LABEL: cmpxchg_flow:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pushq %rbx
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: .cfi_offset %rbx, -16
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; CHECK-NEXT: movq %rcx, %rbx
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; CHECK-NEXT: movq %rsi, %rax
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; CHECK-NEXT: movq %r8, %rcx
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; CHECK-NEXT: lock cmpxchg16b (%rdi)
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; CHECK-NEXT: jne .LBB1_2
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; CHECK-NEXT: # %bb.1: # %true
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; CHECK-NEXT: callq foo
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; CHECK-NEXT: popq %rbx
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; CHECK-NEXT: .cfi_def_cfa_offset 8
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; CHECK-NEXT: retq
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; CHECK-NEXT: .LBB1_2: # %false
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: callq bar
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; CHECK-NEXT: popq %rbx
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; CHECK-NEXT: .cfi_def_cfa_offset 8
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; CHECK-NEXT: retq
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%pair = cmpxchg i128* %addr, i128 %desired, i128 %new seq_cst seq_cst
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%success = extractvalue { i128, i1 } %pair, 1
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br i1 %success, label %true, label %false
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true:
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call void @foo()
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ret void
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false:
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call void @bar()
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ret void
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}
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; Can't use the flags here because cmpxchg16b only sets ZF.
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define i1 @cmpxchg_arithcmp(i128* %addr, i128 %desired, i128 %new) {
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; CHECK-LABEL: cmpxchg_arithcmp:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pushq %rbx
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: .cfi_offset %rbx, -16
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; CHECK-NEXT: movq %rcx, %rbx
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; CHECK-NEXT: movq %rdx, %r9
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; CHECK-NEXT: movq %rsi, %rax
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; CHECK-NEXT: movq %r8, %rcx
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; CHECK-NEXT: lock cmpxchg16b (%rdi)
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; CHECK-NEXT: cmpq %rsi, %rax
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; CHECK-NEXT: sbbq %r9, %rdx
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; CHECK-NEXT: setge %al
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; CHECK-NEXT: popq %rbx
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; CHECK-NEXT: .cfi_def_cfa_offset 8
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; CHECK-NEXT: retq
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%pair = cmpxchg i128* %addr, i128 %desired, i128 %new seq_cst seq_cst
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%oldval = extractvalue { i128, i1 } %pair, 0
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%success = icmp sge i128 %oldval, %desired
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ret i1 %success
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}
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define i128 @cmpxchg_zext(i128* %addr, i128 %desired, i128 %new) {
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; CHECK-LABEL: cmpxchg_zext:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pushq %rbx
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: .cfi_offset %rbx, -16
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; CHECK-NEXT: movq %rcx, %rbx
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; CHECK-NEXT: movq %rsi, %rax
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; CHECK-NEXT: xorl %esi, %esi
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; CHECK-NEXT: movq %r8, %rcx
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; CHECK-NEXT: lock cmpxchg16b (%rdi)
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; CHECK-NEXT: sete %sil
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; CHECK-NEXT: movq %rsi, %rax
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; CHECK-NEXT: xorl %edx, %edx
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; CHECK-NEXT: popq %rbx
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; CHECK-NEXT: .cfi_def_cfa_offset 8
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; CHECK-NEXT: retq
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%pair = cmpxchg i128* %addr, i128 %desired, i128 %new seq_cst seq_cst
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%success = extractvalue { i128, i1 } %pair, 1
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%mask = zext i1 %success to i128
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ret i128 %mask
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}
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define i128 @cmpxchg_use_eflags_and_val(i128* %addr, i128 %offset) {
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; CHECK-LABEL: cmpxchg_use_eflags_and_val:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pushq %rbx
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: .cfi_offset %rbx, -16
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; CHECK-NEXT: movq %rdx, %r8
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: xorl %edx, %edx
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; CHECK-NEXT: xorl %ecx, %ecx
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; CHECK-NEXT: xorl %ebx, %ebx
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; CHECK-NEXT: lock cmpxchg16b (%rdi)
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; CHECK-NEXT: .p2align 4, 0x90
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; CHECK-NEXT: .LBB4_1: # %loop
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; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: movq %rdx, %r9
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; CHECK-NEXT: movq %rax, %r10
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; CHECK-NEXT: movq %rax, %rbx
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; CHECK-NEXT: addq %rsi, %rbx
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; CHECK-NEXT: movq %rdx, %rcx
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; CHECK-NEXT: adcq %r8, %rcx
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; CHECK-NEXT: lock cmpxchg16b (%rdi)
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; CHECK-NEXT: jne .LBB4_1
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; CHECK-NEXT: # %bb.2: # %done
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; CHECK-NEXT: movq %r10, %rax
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; CHECK-NEXT: movq %r9, %rdx
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; CHECK-NEXT: popq %rbx
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; CHECK-NEXT: .cfi_def_cfa_offset 8
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; CHECK-NEXT: retq
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entry:
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%init = load atomic i128, i128* %addr seq_cst, align 16
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br label %loop
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loop:
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%old = phi i128 [%init, %entry], [%oldval, %loop]
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%new = add i128 %old, %offset
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%pair = cmpxchg i128* %addr, i128 %old, i128 %new seq_cst seq_cst
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%oldval = extractvalue { i128, i1 } %pair, 0
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%success = extractvalue { i128, i1 } %pair, 1
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br i1 %success, label %done, label %loop
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done:
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ret i128 %old
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}
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declare void @foo()
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declare void @bar()
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